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Is there a Future for Differentiating ICs for High- End Televisions ? MPSoC04 9 July 2004 Rafael Peset Llopis Philips Consumer Electronics, IC-laboratory, Rafael Peset Llopis 1 Outline High-end televisions Picture Quality


  1. Is there a Future for Differentiating ICs for High- End Televisions ? MPSoC’04 9 July 2004 Rafael Peset Llopis Philips Consumer Electronics, IC-laboratory, Rafael Peset Llopis 1

  2. Outline • High-end televisions • Picture Quality Roadmap • Current approach • Technology Roadmap • Solution? • Conclusions Philips Consumer Electronics, IC-laboratory, Rafael Peset Llopis 2

  3. Television Market Three market segments: – High 1M Philips sets 1500-10000 $ – Mid 3M Philips sets 500-1500 $ – Low 9M Philips sets < 500 $ Philips Consumer Electronics – #2 worldwide – #1 Europe Market players: – Leaders; present in high-end – Followers Philips Consumer Electronics, IC-laboratory, Rafael Peset Llopis 3

  4. Philips Consumer Electronics High-End Television 127 cm Philips Consumer Electronics, IC-laboratory, Rafael Peset Llopis 4

  5. High-End Television High-end market segment: – Entry point innovation – Large margins – Branding – Differentiation is key Current differentiation on picture quality SD/HD source => HD display (Europe/USA) – Spatial up-conversion – Temporal up-conversion – Image enhancements Philips Consumer Electronics, IC-laboratory, Rafael Peset Llopis 5

  6. Outline • High-end televisions • Picture Quality Roadmap • Current approach • Technology Roadmap • Solution? • Conclusions Philips Consumer Electronics, IC-laboratory, Rafael Peset Llopis 6

  7. Picture Quality Roadmap Digital image processing improvements like: – Sub pixel based luminance transient improvement – Dynamic contrast – Digital natural motion – Color dependent sharpness – Green enhancement – Blue stretch – Skin tone correction – 3-dimensional digital noise reduction – scaling Three EISA awards!! Philips Consumer Electronics, IC-laboratory, Rafael Peset Llopis 7

  8. Picture Quality Roadmap Statistics: 401135 gates 32 mm2 278.4 kbit RAM 64 MHz 3 DAC’s PLL 0.18u; 4 metal layers 590 mW Philips Consumer Electronics, IC-laboratory, Rafael Peset Llopis 8

  9. Picture Quality Roadmap 60% PHILIPS GRP 48,5% 50% 46,8% 49,1% SONY 40% 32,8% GRUNDIG 33,1% 38,2% 36,1% 30% PANASONIC 20% LOEWE 10% THOMSON GRP 0% FEB02- APR02- JUN02- AUG02- OCT02- DEC02- FEB03- MAR02 MAY02 JUL02 SEP02 NOV02 JAN03 MAR03 Philips Consumer Electronics, IC-laboratory, Rafael Peset Llopis 9

  10. Picture Quality Roadmap So far so good… How is it implemented? Philips Consumer Electronics, IC-laboratory, Rafael Peset Llopis 10

  11. Picture Quality Roadmap Generation N Generation N+1 C 2 D PS PS High End B C PS PS Mid End A B Low End PS PS Philips Consumer Electronics, IC-laboratory, Rafael Peset Llopis 11

  12. Picture Quality Roadmap So far so good… How is it implemented? – Common TV platform provided by Philips Semiconductors – Differentiation with additional key ICs – Migration to future common TV platform Lead time of differentiating functionality in market! Philips Consumer Electronics, IC-laboratory, Rafael Peset Llopis 12

  13. Picture Quality Roadmap G1 G2 G3 G4 G5 year 2001 2003 2005 2007 2010 resources 100% 140% 320% 600% 1200% 100% 140% 320% 600% 1200% (manyears) technology 180 180 120 90 65 180 180 120 90 65 (nm) frequency 64 64 133 250 350+ (MHz) #Mgates 100% 170% 500% 1000% 2000% 100% 170% 500% 1000% 2000% incl. mem #Mgates 100% 150% 500% 1250% 2500% 100% 150% 500% 1250% 2500% excl. mem Philips Consumer Electronics, IC-laboratory, Rafael Peset Llopis 13

  14. Picture Quality Roadmap So there is the pain!! – Exploding engineering costs – Exploding complexity – Exploding mask costs (~1M $ for 0.065u)!! Current design approach is unsustainable – Innovation will stop RIP Philips Consumer Electronics, IC-laboratory, Rafael Peset Llopis 14

  15. Outline • High-end televisions • Picture Quality Roadmap • Current approach • Technology Roadmap • Solution? • Conclusions Philips Consumer Electronics, IC-laboratory, Rafael Peset Llopis 15

  16. Requirements Huge computational requirements – HD @ 100fps = 200M pixels/s – 1 pixel per clock – 100-400 GOPS – Regular & control dominated pixel processing Communication requirements: – Streaming data – Latency tolerant (beware audio/video & football) Power dissipation bounded (no fans) Many different use cases (diversity) (no + Alt + ) Ctrl Del Stability Philips Consumer Electronics, IC-laboratory, Rafael Peset Llopis 16

  17. Current Approach Computation: – RTL VHDL blocks – Heavy pipelining Communication: – FIFO buffers – Handshaking – Bypasses – Centralized memory Chain of video processing functions: Philips Consumer Electronics, IC-laboratory, Rafael Peset Llopis 17

  18. Current Approach Many different use cases: – Source (size, frame rate, TV, movie) – Display (size, type) Superset approach: – Large volume – High complexity – Verification issue !!!! Philips Consumer Electronics, IC-laboratory, Rafael Peset Llopis 18

  19. Outline • High-end televisions • Picture Quality Roadmap • Current approach • Technology Roadmap • Solution? • Conclusions Philips Consumer Electronics, IC-laboratory, Rafael Peset Llopis 19

  20. Technology Evolution ASICs are overkill 100000 10000 ASI C 1000 t r end ASI C 100 al t er a G OPS t r end FPGA 10 DSP 1 RI SC i nt el 0. 1 t r end MPU 0. 01 Embedded cores provides less performance than stand-alone cores 0. 001 Jan- Jan- Jan- Jan- Jan- 90 95 00 05 10 Year Philips Consumer Electronics, IC-laboratory, Rafael Peset Llopis 20

  21. Technology Evolution FPGAs have improved 1000 in power efficiency 100 ASI C t r end ASI C 10 al t er a W G OPS/ t r end FPGA 1 3x DSP RI SC 0. 1 i nt el 80x t r end MPU 0. 01 Embedded cores are more power efficient than stand-alone cores 0. 001 Jan- Jan- Jan- Jan- Jan- 90 95 00 05 10 Year Philips Consumer Electronics, IC-laboratory, Rafael Peset Llopis 21

  22. Technology Evolution 1000 100 ASI C 10 t r end ASI C 1 m m 2 al t er a t r end FPGA G OPS/ 20x 0. 1 DSP RI SC 0. 01 40x i nt el 0. 001 t r end MPU 0. 0001 Embedded cores are more area efficient than stand-alone cores 0. 00001 Jan- Jan- Jan- Jan- Jan- 90 95 00 05 10 Year Philips Consumer Electronics, IC-laboratory, Rafael Peset Llopis 22

  23. Technology Evolution Observations: – FPGAs and processors providing sufficient performance – Huge area and power expenses – Hybrids seem likely Philips Consumer Electronics, IC-laboratory, Rafael Peset Llopis 23

  24. Outline • High-end televisions • Picture Quality Roadmap • Current approach • Technology Roadmap • Solution? • Conclusions Philips Consumer Electronics, IC-laboratory, Rafael Peset Llopis 24

  25. Solution? Subset with flexibility approach: Key: – Composability – Flexibility – Scalability Philips Consumer Electronics, IC-laboratory, Rafael Peset Llopis 25

  26. Solution? Exploding complexity and engineering costs: Next step in design paradigm Transistors => standard cells => synthesis => ? Subset with flexibility approach IP reuse Composability Exploding mask costs: Even larger volumes Share silicon over more products Flexibility/scalability Philips Consumer Electronics, IC-laboratory, Rafael Peset Llopis 26

  27. Solution? Computation: Embedded processors? C A B Dedicated HW blocks? Flexible (eFPGA) HW blocks? F D E Communication: Point to point? I G H Busses? Network on Chip? Philips Consumer Electronics, IC-laboratory, Rafael Peset Llopis 27

  28. Computation Embedded Processors: (Tunable) RISC / CISC VLIW / ULIW 1 pel/clk SIMD / vector Is SW cheaper than HW? Dedicated HW blocks: Behavioral synthesis Flexible HW blocks: Behavioral Synthesis Several e-FPGA blocks 20x area Fixed blocks with e-FPGA parts Philips Consumer Electronics, IC-laboratory, Rafael Peset Llopis 28

  29. Communication Point to point: Inflexible Not scalable Busses: Not scalable Network on Chip: Flexible and scalable Key aspects: – Cost / area – Required degree of flexibility (diversity) – Composability Philips Consumer Electronics, IC-laboratory, Rafael Peset Llopis 29

  30. Outline • High-end televisions • Picture Quality Roadmap • Current approach • Technology Roadmap • Solution? • Conclusions Philips Consumer Electronics, IC-laboratory, Rafael Peset Llopis 30

  31. Questions/Challenges Conclusions Computation: – Optimal mix ASIC / e-FPGA / programmable cores – What should be flexible, what not – Programming model Communication: – Composability – Flexibility / scalability Both: – Power / area efficiency – Engineering efficiency Total cost (engineering hours + masks + silicon area) Philips Consumer Electronics, IC-laboratory, Rafael Peset Llopis 31

  32. Philips Consumer Electronics, IC-laboratory, Rafael Peset Llopis 32

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