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IP vs. Chiplets SOC Disintegration Trend at Deep FinFET Submicron - PowerPoint PPT Presentation

Sep 05, 2022 •394 likes •537 views

IP vs. Chiplets SOC Disintegration Trend at Deep FinFET Submicron Weijin Dai Executive Vice President, Chief Strategy Officer, IP Division General Manager September 2018 SOC Disintegration at Deep FinFET Submicron - Chiplets SOC to Chiplet

  1. IP vs. Chiplets SOC Disintegration Trend at Deep FinFET Submicron Weijin Dai Executive Vice President, Chief Strategy Officer, IP Division General Manager September 2018

  2. SOC Disintegration at Deep FinFET Submicron - Chiplets

  3. SOC to Chiplet – The Economics ▲ Higher cost per gate below 28 nm HKMG bulk 16FF 10FF 7FF 22FDX 12FDX 28HKMG 28FDS Source: IBS ▲ Advantages of ”SOC” composed by chiplets ► Components reuse, enable multiple variations ► Mixed process technology ► Simplify “SOC” design, faster time to market ► Reduce “SOC” Cost

  4. Industry Leaders Building Chiplet Enabling Technology

  5. Back To The Future! Chiplets – Virtual SOC Specific Function Chips SOC

  6. VeriSilicon IP Portfolio Compute Neural Network AI ISP GPU Video Audio/Voice Server Class Compression/ DISPLAY Encryption Automotive Tablets Smartphone & Wearables & IoT

  7. VeriSilicon Technology in Edge Device, Edge Server and Cloud Edge Server Video Transcoding Cloud, Pixel Compression High Performance Computing Data Center Edge Server Automotive Surveillance AR/VR Wearables Smart Home, Vision, Voice CL CL OU OU D In f o t a i n m e D r v i e r I n s t r u m e n t nt nt a n d A D A S B , o d y C u l s t e r P a s s e n g e a n d r P o w e r t r a n i M o b e i l E C U s T e l e m a t c i s D e v i c e s V 2 X R e a r S e a t C a m e r a s E n e t r a t n i m e n t A u d o i A m p f l e i i r

  8. Lego of Chiplets Processor Chiplets Mix Chiplets in a solution Video clock PL Ls 32b Clock and 32b ResetControl Video Vision/AI 64b Vision/AI DDR Controller DDR PHY PCIe Controller PCI XBAR (AHB/APB/AXI) 64b 32b PCIe PHY Gen3x4 Compute 64b Scale up performance with Chiplets Processor DDR Controller D 32b 64b master AXI4 DDR PHY M slave GPU AHB A 32b APB GPU GPU 64b System 32b Controll er 2x32b ISP

  9. Subsystem IP – Pixel Compression & Encryption Nonsecure Secure Registers Registers Register Access Masters DDR Access Slaves DEC800 Nonsec Compression Pipe Host Line Buffer MMU FIFO MUX Block IED Pipe Secure Compression Pipe Bypass Bypass

  10. Subsystem IP - AI Deep Integration Intelligent Surveillance Camera Solution Smart Sensors cell phone, car back camera VISION/AI Video Encoder ISP8000 VIP8000 VC8000 VIPNano AI Compute/AR/VR Solution Smart Home, talking device Voice AI GPU/Compute ZSP VIPPico GC8000VX + VIP8000 AI

  11. AI is Everywhere, AI Needs to be Build into Subsystem IP ▲ Natural User Interface ► AI VISION ► AI VIOCE ► AI Sensors ▲ Multi-Media ► Graphics, Video, Audio, Voice

  13. The Trend and The Need SOC Virtual SOC Subsystem IP chiplet The Trend The Need IP

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