IBCM 1 C++ to assembly to machine code # call operator<< - PowerPoint PPT Presentation

address value (16 bits) IBCM machine state … ) 16-bit words 4096 ( memory 0xFFF 0xFFE 0xFFD 0x003 … accumulator 0x002 0x001 0x000 3 registers (16 bits each) program register instruction register 9

IBCM machine state accumulator memory 0xFFF 0xFFE 0xFFD … … 0x003 0x002 0x001 0x000 3 registers (16 bits each) program register instruction register 9 address value (16 bits) 4096 ( 2 12 ) 16-bit words

on words we deal with a lot of 16-bit values “natural” size of this machine size of registers size of memory accesses … IBCM: only size for registers IBCM: size of instructions in machine code 10 convention: natural size called word

IBCM instruction format readH count address opcode which instruction? halt — opcode 0 stops the machine I/O operation – opcode 1 4 types (“I/O op” bits) into or out of accumulator I/O op name efgect 00 read hex word shift 01 readC read ASCII character (into accumulator bits 0-7 ) 10 printH write hex word 11 printC write ASCII charcater (from accumulator bits 0-7 ) shift — opcode 2 4 types (“shift op”) move bits of accumulator around count is number of places to move op op 15 14 13 12 11 10 0 9 8 7 6 5 4 3 2 1 0 0 0 0 0 0 I/O 0 0 1 0 1 0 opcode (unused) (unused) (unused) halt I/O shifts others 11

shifts 0000 0001 1110 0001 rotate: move bits, wrap around shift: move bits, fjll with 0 s 1110 0001 1110 0001 rotR rotate right 11 0111 1000 0111 1000 rotL rotate left 10 shiftR has shift op (2 bits) and count (3 bits) shift right 01 0111 1000 0111 1000 shiftL shift left 00 example result name desc. shift op example: accumulator= 0000 1111 0000 1111 ; count = 3 12

other instructions C use accumulator ( a or “acc”) and/or address in instruction xor logical ‘xor’ memory into acc A not logical complement acc B nop — do nothing (‘no operation’) jmp or jump to addr D jmpe jump to addr if acc is 0 E jmpl jump to addr if acc is negative F brl jump to addr and set acc to the address following the brl logical ‘or’ memory into acc 9 8 add op name pseudocode description 3 load load acc from memory 4 store 5 store acc to memory 13 add memory to acc 6 logical ‘and’ memory into acc and 7 sub subtract mememory from acc a ← mem[addr] mem[addr] ← a a ← a + mem[addr] a ← a + mem[addr] a ← a ∧ mem[addr] a ← a ∨ mem[addr] a ← a ⊕ mem[addr] a ← ~a PC ← addr if a == 0: PC ← addr if a < 0: PC ← addr a ← PC + 1; PC ← addr

brl “ br anch and l ink” used to implement method calls: example: addr is the address of a method a becomes the return address instruction to execute after the method returns issue in IBCM: jumping to a ??? 14 a ← PC + 1; PC ← addr

ICBM assembly language don’t have an assembler implemented …but let’s see what an assembly language would look like 15

ICBM assembler assembly: load 0x100 machine code: 0011 000100000000 assembly: add 0x200 machine code: 0101 001000000000 assembly: jmpe 0x442 machine code: 1101 010001000010 work with hard-coded addresses? how to set initial values? 16 → opcode= 3 , addr= 0x100 → opcode= 5 , addr= 200 → opcode= D , addr= 442

ICBM assembler assembly: load 0x100 machine code: 0011 000100000000 machine code: 0101 001000000000 machine code: 1101 010001000010 work with hard-coded addresses? how to set initial values? 16 → opcode= 3 , addr= 0x100 assembly: add 0x200 → opcode= 5 , addr= 200 assembly: jmpe 0x442 → opcode= D , addr= 442

labels: addresses as names 100 // addr 3: do nothing nop end // addr 2: [otherwise] goto 0 start jmp // addr 1: if a < 0: goto 3 end jmpl = mem[100] // addr 0: a add add start // addr 3: do nothing nop // addr 2: [otherwise] goto 0 0 jmp // addr 1: if a < 0: goto 3 3 jmpl 100 17 // addr 0: a + = mem[100]

labels: addresses as names add // addr 3: do nothing nop end // addr 2: [otherwise] goto 0 start jmp // addr 1: if a < 0: goto 3 end jmpl 100 add start // addr 3: do nothing nop // addr 2: [otherwise] goto 0 0 jmp // addr 1: if a < 0: goto 3 3 jmpl 100 17 // addr 0: a + = mem[100] // addr 0: a + = mem[100]

labels: addresses as name // addr 2: [otherwise] goto 0 replaced by address when executable is produced address of instruction or of data name for a memory address // addr 3: do nothing nop end start start jmp // addr 1: if a < 0: goto 3 end jmpl 100 add 18 // addr 0: a + = mem[100]

ICBM assembler assembly: load 0x100 machine code: 0011 000100000000 machine code: 0101 001000000000 machine code: 1101 010001000010 work with hard-coded addresses? how to set initial values? 19 → opcode= 3 , addr= 0x100 assembly: add 0x200 → opcode= 5 , addr= 200 assembly: jmpe 0x442 → opcode= D , addr= 442

assembly directives not everything in assembly is instructions program data, strings, etc. assemblers have directives processed by assembler to produce special output dw directive (“defjne word”) i dw 75 place the value 75 in memory name the address where it is placed i 20

example with dw load hundred } print a; while (a >= 0) { int a = 100; dw 1 one hundred dw 100 halt end jmp loop sub one // print a printH // if a < 0: goto end jmpl end loop 21 // a ← 100 // a ← a - 1 a − = 1;

variables with dw load i i += j; int i = 10, j = 20; dw 20 j dw 10 i store j sub i load j add j 22 store i sub i j − = i; j − = i;

IBCM decoding 0000 shift amount in bottom 4 bits shiftR shift: bits 10–11 = 01 printH I/O: bits 10–11 = 10 load/add — rest is address halt — rest of instruction ignored 5 — add 3 — load 1 — some kind of I/O 0 — halt most signifjcant 4 bits = opcode halt ?? shift value 2403 ?? I/O 1800 add ? 5002 load ? 3041 halt 0005 halt 000f halt 0000 as instruction 23

IBCM decoding 0000 shift amount in bottom 4 bits shiftR shift: bits 10–11 = 01 printH I/O: bits 10–11 = 10 load/add — rest is address halt — rest of instruction ignored 5 — add 3 — load 1 — some kind of I/O 0 — halt most signifjcant 4 bits = opcode halt ?? shift value 2403 ?? I/O 1800 add 0x2 5002 load 0x41 3041 halt 0005 halt 000f halt 0000 as instruction 23

IBCM decoding value shift amount in bottom 4 bits load/add — rest is address halt — rest of instruction ignored 5 — add 3 — load 1 — some kind of I/O 0 — halt most signifjcant 4 bits = opcode halt 0000 shiftR ? 2403 printH 1800 add 0x2 5002 load 0x41 3041 halt 0005 halt 000f halt 0000 as instruction 23 I/O: bits 10–11 = 10 → printH shift: bits 10–11 = 01 → shiftR

IBCM decoding 0000 shift amount in bottom 4 bits shiftR shift: bits 10–11 = 01 printH I/O: bits 10–11 = 10 load/add — rest is address halt — rest of instruction ignored 5 — add 3 — load 1 — some kind of I/O 0 — halt most signifjcant 4 bits = opcode halt shiftR 3 value 2403 printH 1800 add 0x2 5002 load 0x41 3041 halt 0005 halt 000f halt 0000 as instruction 23

IBCM format dw n dw 0 0000 005 zero dw 0 0001 006 one 1 int a[] 5000 007 adit dw 5000 ... leave space for changes 1000 00A start readH read array addres 0000 004 0 our simulators: fjrst four characters of each line only 0000 001 example of suggested format: mem locn label op addr comments C00A 000 jmp start skip around the vars i dw dw 0 int i 0000 002 s dw 0 int s 0000 003 a 24

leaving room for changes insert blank space for: extra variable/constant declaratoins maybe extra instructions in loops? to make changes easier 25

IBCM sample program ???? store 0 006 f000 brl 0 000 PC IR 005 3000 accumulator “or” — bitwise or: bit set in result if set in either operand “not” — fmip every bit 4000 not addr. value add 0 as instruction 000 3000 load 0 001 5000 002 a000 6001 sub 1 003 8003 or 3 004 26

IBCM sample program 3000 store 0 006 f000 brl 0 000 PC IR addr. value 3000 accumulator “or” — bitwise or: bit set in result if set in either operand “not” — fmip every bit 4000 005 not a000 as instruction 000 3000 load 0 001 5000 add 0 002 6001 sub 1 003 8003 or 3 004 26 accumulator ← 0x3000 = memory[0]

IBCM sample program 3000 store 0 006 f000 brl 0 001 PC IR 005 3000 accumulator “or” — bitwise or: bit set in result if set in either operand “not” — fmip every bit 4000 not addr. value add 0 as instruction 000 3000 load 0 001 5000 002 a000 6001 sub 1 003 8003 or 3 004 26

IBCM sample program 5000 store 0 006 f000 brl 0 001 PC IR addr. value 6000 accumulator “or” — bitwise or: bit set in result if set in either operand “not” — fmip every bit 4000 005 not a000 as instruction 000 3000 load 0 001 5000 add 0 002 6001 sub 1 003 8003 or 3 004 26 accumulator ← 0x6000 = 0x3000 + memory[0]

IBCM sample program 6001 store 0 006 f000 brl 0 002 PC IR addr. value 5000 accumulator “or” — bitwise or: bit set in result if set in either operand “not” — fmip every bit 4000 005 not a000 as instruction 000 3000 load 0 001 5000 add 0 002 6001 sub 1 003 8003 or 3 004 26 accumulator ← 0x1000 = 0x6000 - memory[1]

IBCM sample program addr. value “not” — fmip every bit “or” — bitwise or: accumulator 9003 IR 8003 PC 003 brl 0 f000 006 store 0 4000 005 not a000 004 as instruction 000 3000 load 0 001 5000 add 0 002 6001 sub 1 003 8003 or 3 26 accumulator ← 0x9003 = 0x1000 OR memory[3] bit x set in result if set in either operand

IBCM sample program a000 store 0 006 f000 brl 0 004 PC IR addr. value 6ffc accumulator “or” — bitwise or: bit set in result if set in either operand “not” — fmip every bit 4000 005 not a000 as instruction 000 3000 load 0 001 5000 add 0 002 6001 sub 1 003 8003 or 3 004 26 accumulator ← 0x6ffc = NOT 0x9003

IBCM sample program 4000 store 0 006 f000 brl 0 005 PC IR addr. value 6ffc accumulator “or” — bitwise or: bit set in result if set in either operand “not” — fmip every bit 4000 005 not a000 as instruction 000 6ffc load 0sub FFC 001 5000 add 0 002 6001 sub 1 003 8003 or 3 004 26 memory[0] ← accumulator

IBCM sample program f000 store 0 006 f000 brl 0 006 PC IR addr. value 0007 accumulator “or” — bitwise or: bit set in result if set in either operand “not” — fmip every bit 4000 005 not a000 as instruction 000 6ffc load 0sub FFC 001 5000 add 0 002 6001 sub 1 003 8003 or 3 004 26 accumulator ← PC + 1PC ← 0

IBCM sample program 6ffc store 0 006 f000 brl 0 001 PC IR addr. value ???? accumulator “or” — bitwise or: bit set in result if set in either operand “not” — fmip every bit 4000 005 not a000 as instruction 000 6ffc load 0sub FFC 001 5000 add 0 002 6001 sub 1 003 8003 or 3 004 26 accumulator ← ??? = 0x0007 - memory[ 0xFFC ]

(S2's code) can omit jump to S3, example: if/else (S1's code) (S3's code) S3 since it’s right after S2 skip over S2 after S1 jmp S3 S1 if (B == 0) jmpe — jump if acc. zero jmp S2 jmpe S1 load B S3; S2; else S1; 27

example: if/else if (B == 0) (S3's code) S3 since it’s right after S2 skip over S2 after S1 jmp S3 (S1's code) S1 jmpe — jump if acc. zero jmp S2 jmpe S1 load B S3; S2; else S1; 27 (S2's code) can omit jump to S3,

example: while need constant ‘5’ (S2's code) S2 jmp loop (S1's code) S1 done with loop B - 5 < 0 jmpl S2 while (B >= 5) sub five load B loop dw 5 five jmp loop S2; S1; 28

example: while while (B >= 5) (S2's code) S2 jmp loop (S1's code) S1 done with loop need constant ‘5’ jmpl S2 sub five load B loop dw 5 five jmp loop S2; S1; 28 B - 5 < 0 →

example: sum the task: print sum halt 29 read in integer n from keyboard compute sum of integers 1 to n (inclusive)

sum psuedocode read n; i = 1; // index in the array s = 0; // ongoing sum while (i <= n) { s += i; i += 1; } print s; 30

translating sum (1) dw 0 don’t execute vars, etc. then store in variable load into accum. store s load zero store i load one store n start readH label instr jmp start label instr and needed constants allocate variables zero read n; print s; i = 1; s = 0; while (i <= n) { s += i; i += 1; } i dw 1 dw 0 s dw 0 n dw 0 one 31

translating sum (2) jmp loop load s add i store s load i add one store i done ‘done’ = end of loop return to start of loop label after end of loop jmp loop done load s printH if n - i < 0: goto done jmpl done read n; print s; i = 1; s = 0; while (i <= n) { s += i; i += 1; } ... sub i load zero store s label instr allocate vars/constants initial reads/assignments loop load n 32

example: array sum the task: print sum halt 33 read address a from keyboard read size n from keyboard compute sum of n -element array at that addres

array sum psuedocode read a; // array base address read n; // array size i = 0; // index in the array s = 0; // ongoing sum while (i < n) { s += a[i]; i += 1; } print s; 34

accessing array elements? want to add a[i] to something… can compute address of a[i] in the accumulator: load a add i …but no instruction to load address into accumulator …or add address into accumulator … solution: write add a[i] instruction encoding: opcode=5 rest=address of a[i] 35

the trick: writing instructions addInst a[i] s += 0 dw doit accum = s s load plant inst into the code doit store address += i i add address += a a add load inst. template addInst load ... dw 0x45 i dw 0x100 a dw 0x5000 36 0x5000 (add 0) → 0x5100 (add 0x100) → 0x5145 (add 0x145)

translating array sum (1) store a readH read array size store n load zero store i i = 0 s read array address s = 0 loop load n if (i >= N) goto xit ... xit load s printH halt store start readH read a; dw 0 read n; i = 0; s = 0; while (i < n) { s += a[i]; i += 1; } print s; jmp start i s label instr comment dw 0 n dw 0 one dw 1 zero dw 0 addInst dw 0x5000 add inst to fill in 37

translating array sum (2) store i load s s = s + ... doit dw 0 <-- replaced with 'add (a+i)' store s load i add one jmp loop doit label instr comment ... addInst dw 5000 add inst to fill in ... xit load s printH halt plant inst into the code store read a; n read n; i = 0; s = 0; while (i < n) { s += a[i]; i += 1; } print s; loop load if (i >= N) goto xit i sub i jmpl xit jmpe xit load addInst add a add 38

writing IBCM high level pseudocode i = 1; while (i < max) ... IBCM assembly code load one store i ... test by hand (trace code) IBCM machine code 3016 4005 ... run in IBCM simulator 39

useful patterns (1) something something S2 jmp top something S1 jmpl S2 top load X S2 } S1 while (X >= 0) { S3 if (X < 0) { something S1 jmp S3 something S2 jmpl S1 load X S3 } S2 } else { S1 40

useful patterns (2) (add opcode) x = accum store x becomes add *p dw 0xFFFF doIt accum = x load x store doIt accum = 0x5<p's address> add p accum = 0x5000 load addOpcode ... addOpcode dw 0x5000 *p = x x += *p becomes store *p dw 0xFFFF doIt accum = x load x store doIt accum = 0x4<p's address> add p accum = 0x4000 load storeOpcode ... (store opcode) storeOpcode dw 0x4000 41

IBCM 1 C++ to assembly to machine code # call operator<< - PowerPoint PPT Presentation

IBCM 1 C++ to assembly to machine code # call operator<< 48 83 ec 08 # sub rsp, 8 be 64 07 40 00 # mov esi, .LC0 == 0x400764 bf 60 10 60 00 # mov edi, _ZSt4cout == 0x601060 e8 bd ff ff ff 31 c0 (actually binary bytes without

Course Intro / Logistics 1 layers of abstraction: programs (1) Objects, etc. map.insert(key,

INTERNATIONAL BUSINESS CENTRE OF MADEIRA (IBCM) OTHER TAX PRIVILEGED REGIMES APPLIED IN