Handheld Device Architectures: Are We Doing Enough? Manu Awasthi Ashoka University
Handheld Devices
Android Versions https://www.counterpointresearch.com/can-android-o- de-fragment-android/
Memory Usage https://eitik.com/17-android-browser-tested-for-memory-usage-in-2018/
A Few Trends 5
Mobile Architecture Research ● Mobile computing research: 1% of research papers published each focus on mobile computing. ● Lack of tools V. J. Reddi, H. Yoon, and A. Knies, “Two billion devices and counting,” IEEE Micro, vol. 38, no. 1, pp. 6–21, January/February 2018.
What is needed? • Tool and Simulators • Benchmarks BBench AsimBench (Michigan) (ICT, China)
Current Status
Android Emulator Android Emulator How do we leverage the existing Android Virtual Device ecosystem to study memory Device Behavior (AVD) behavior of Android apps? Android Open Source Project (AOSP)
META: Tool Design MobiCom 2018
Tracer Module - Modifications in QEMU Modified Translation Path
Raw Traces
META: Tool Design : Cache Module
Cache Simulation Module L1 and L2 Cache hit rates available after running a calculator on a range of android versions from Android 4 (Kitkat) to Android 7 (Nougat).
META: Tool Design: Memory Module
NVMain Integration NVMain : cycle-level main memory ● simulator Can simulate DRAM, emerging non- ● volatile memories at the architectural level. Phase change memory, STT-RAM ○
Potential Use-cases Trace Generation ● The traces can also be used to analyze instruction distribution profile. ○ Creation of synthetic inputs to models based on real instruction profiles ○ Cache Hierarchy Modeling ● A custom, N-level cache hierarchy ○ DRAM, Non-volatile, Hybrid Memory Simulation ● NVMain can model most technologies ○
Trends in Handheld Devices https://thehackernews.com/2015/09/6gb-ram-smartphone.html 18 https://www.pwc.com/gx/en/technology/mobile-innovation/assets/pwc-dram-memory.pdf http://www.es.ele.tue.nl/~kgoossens/Chandrasekar14PHD.pdf
Handhelds and Smartphones Hexagon DSP: An Architecture Optimized for Mobile Multimedia and Communications, IEEE Micro, Vol 19 34, 2014
Main Memory in Handhelds Camera Modem Display Sensors Core 4 Core 3 GPU Audio Core 1 Core 2 Fabric MC Fabric DRAM DRAM 20 20
Handheld Applications If frequently accessed data can be concentrated to the fastest regions of a hybrid memory hierarchy, memory system’s energy consumption can be reduced significantly, without any significant loss in performance and user experience . 21
Hybrid Memory Architectures for Handhelds 4 GB 0 GB Total Physical Address Space Sub Address Space Sub Address Space Sub Address Space Mem DRAM NVM Tech 2
Hybrid Main Memory in Handhelds Camera Modem Display Sensors Core 4 Core 3 GPU Audio Core 1 Core 2 Fabric Fabric MC MC DRAM NVM DATE 2018 23 23
Hybrid Main Memory in Handhelds Camera Modem Display Sensors Core 4 Core 3 GPU Audio Core 1 Core 2 Fabric Fabric MC MC MC MC N N DR DR V V AM AM M M DATE 2018 24
Results 25
Results – 4 Controllers 26
Key Takeways • Research into handheld devices architectures is important, more so in the era of wearables • Memory sub-system is becoming increasingly important, even in handheld • Need tools, benchmarks to carry research forward • META – one step in that direction • NVMs will eventually be integrated into memory hierarchy • Mechanisms to provide access to high capacity, low latency memories might require intelligent data management • H/W – S/W co-design is better than one or the other. 27
Acknowledgements Varun Gohil, Sneha Ved (IIT Gandhinagar) Nisarg Parikh (LD College of Engineering)
Recommend
More recommend