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Event announcement Topic: Thermal-Aware Design of 2D/3D Many-Core Servers with Inter- Tier Liquid Cooling Speaker: Prof. David Atienza, cole polytechnique fdrale de Lausanne (EPFL), Switzerland Time/Location: Monday, July 7th, 16:00,


  1. Event announcement Topic: Thermal-Aware Design of 2D/3D Many-Core Servers with Inter- Tier Liquid Cooling Speaker: Prof. David Atienza, École polytechnique fédérale de Lausanne (EPFL), Switzerland Time/Location: Monday, July 7th, 16:00, Room H120 Technologiefabrik 1/31

  2. Bachelor/Master Thesis: Build your own manycore System-On-Chip ● FPGAs ZTEX FPGA Module 1.15 src: http://www.ztex.de/usb-fpga-1/usb-fpga-1.15.e.html ● Network on Chip ● Verilog ● SystemC ● Qt OptimSoc interested? http://www.optimsoc.org/ volker.wenzel@kit.edu DFG SPP 1500 2/31 Dependable Embedded Systems http://spp1500.itec.kit.edu/

  3. Dennard Scaling and Power ● see blackboard 3/31

  4. The end of Moore's law? „ Prediction is very difficult, especially about the future. “ Niels Bohr (1885 - 1962) 4/31 src: http://en.wikipedia.org/wiki/Moore%27s_law

  5. 2nd law of thermodynamics src:de.wikipedia.org/wiki/ Entropie_Thermodynamik Aging Mechanisms in Integrated Circuits probabilistic Aging Phenomena physical empirical 5/31 src: de.wikipedia.org/wiki/Tesla-Transformator

  6. Aging Mechanisms in Integrated Circuits ● Electromigration (EM) ● Negative Bias Temperature Instability (NBTI) ● Hot Carrier Degradation (HCID) ● Time Dependent Dielectric Breakdown (TDDB) ● Soft Errors ● Process Variation 6/31

  7. Electromigration What is it? ● very old reliability concern ● physical migration of atoms through current ● „electron wind“ = momentum transfer of electrons to atoms/ions ● affects metal-interconnects ● power and ground wires (DC current flow) ● voids (internal failure) ● hillocks (hillock failure) src: http://en.wikipedia.org/wiki/Electromigration 7/31

  8. Electromigration How to model EM? ● Black's equation (empirical model) – A constant – j current density – n parameter – Q activation energy in eV – k Boltzmann constant – T temperature in K ● Homework Challenge: Derive standard deviation of Black's equation. 8/31

  9. Electromigration How to deal with EM? ● copper better than aluminium for inter- connects ● design rules ● TCAD Simulation of wires 9/31

  10. NBTI: Preparation Threshold Voltage src:http://en.wikipedia.org/wiki/Threshold_voltage 10/31

  11. NBTI: Preparation Hydrogen? ● Hydrogen-terminated silicon surface ● chemical passivation for silicon substrate ● remove natural SiO 2 surface ● terminate dangling bonds ● realized by treatment with HF 11/31

  12. NBTI What is it? ● = Negative bias temperature instability ● mainly p-channel MOSFETs ● increases V th over long periods of time (years) parametric ● decreasing transconductance, linear drain current, degradation saturation current, channel mobility,... ● stress means – negative gate voltages – at elevated temperatures ● signal probability (SP) important 12/31

  13. NBTI Br eaking Bo nds ● Model 1: Reaction-Diffusion – breaking of SiH at SiO 2 /Si substrate interface – H diffuses away ● Model 2: Charge Trapping ● creation of – interface traps src:http://www.iue.tuwien.ac.at/phd/entner/ (permanent traps) – oxide traps (can recover) Quiz: How could you check if the hydrogen at the Si surface is really responsible for NBTI? 13/31

  14. NBTI Br eaking Bo nds src: [Schro04] 14/31

  15. NBTI shift of threshold voltage ● power law time dependence – initially quick degradation & recovery ● Arrhenius law temperature dependence ● highly device-dependent 15/31

  16. NBTI impact on different electronic components effect on latch: effect on SRAM: ● reduced SNM ● reduced SNM ● increased switching time effect on ring effect on logic gate: oscillator: ● increased delay ● frequency deterioration 16/31

  17. NBTI „Have you tried turning it off and on again?“ ● NBTI recovers (partially) ● makes measurement V th shift [V] difficult ● mitigation techniques Stress Recovery ● NBTI depends on – voltage stress 0 Vg [V] – signal probability -1 – temperature Time 17/31

  18. Static Noise Margin: a 6-T SRAM cell... src:http://www.iue.tuwien.ac.at/phd/entner/node34.html 18/31

  19. Static Noise Margin What are Butterfly Curves? ● Voltage Transfer Curve (VTC) ● SNM is length of biggest square ● SNM quantifies resiliency to noise src:http://www.iue.tuwien.ac.at/phd/entner/node34.html 19/31

  20. Static Noise Margin What are Butterfly Curves? NBTI decreases SNM src:http://www.iue.tuwien.ac.at/phd/entner/node34.html 20/31

  21. Hot Carrier Degradation What is HCID? ● acceleration of carriers (electrons/holes) under lateral electric fields ● hot electrons cause damage ● dependent on – supply voltage – channel geometry src: http://www.iue.tuwien.ac.at/phd/entner 21/31

  22. Hot Carrier Degradation Maxwell Boltzmann Distribution ● electrons at right tail causing damage in device – „hot electrons“ – „lucky electrons“ – electrons w/ high kinetic energy 22/31

  23. Time Dependent Dielectric Breakdown What is TDDB? ● old reliability concern ● degrade oxide layer's insulating property by breaking of Si-O bonds ● leads to excessive gate drain current ● depends on – dielectric thickness – manufacturing quality of gate oxide 23/31 src:images.nationalgeographic.com

  24. Time Dependent Dielectric Breakdown What is TDDB? BINGO! src: https://nanohub.org/resources/17208/download/2013.03.01-ECE695A-L21.pdf 24/31

  25. Time Dependent Dielectric Breakdown What is TDDB? ● more recent: breakdown ist not instantaneous hard breakdown vs. soft breakdown aka Progressive Breakdown ● degrade drain current by 10% ● shift threshold voltage by 75mV (like NBTI, but without recovery) ref. „Circuit-level delay modeling considering both TDDB and NBTI“ (Yu Cao) 25/31

  26. What is TDDB? Mitigation ● TDDB is Voltage Accelerated Process (Reducing gate voltage helps) ● Power gated circuits do not degrade from TDDB. ● Soft breakdown can partially be tolerated in thin oxides ● Thickness of gate oxide, voltage chosen at transistor design time for desired chip life time ● Reducing Temperature helps 26/31

  27. Comparison of TDDB and NBTI NBTI: TDDB: ● diffusion of H, H 2 in gate/poly ● increases leakage ● traditionally: hard ● creates traps in Si/SiO 2 breakdown due to interface conducting channel in ● recovery dielectric ● shifts V th ● no recovery ● magnitude depends on duty ● recently:soft/hard TDDB cycle aka signal probability ● shifts V th 27/31

  28. Comparison of TDDB, NBTI, HCID src: https://nanohub.org/resources/17208/download/2013.03.01-ECE695A-L21.pdf 28/31

  29. Conclusions ● Electromigration ● NBTI ● Hot Carrier Injection ● TDDB Quiz: Which part affects what? src: http://de.wikipedia.org/wiki/Metall-Oxid-Halbleiter-Feldeffekttransistor 29/31

  30. Sources ● „ Intrinsic Transistor Reliability Improvements from 22nm Tri- Gate Technology “ Ramey, S. et al ● „ A Lifetime Projection Method Using Series Model and Acceleration Factors for TDDB failures of Thin Gate Oxides “ Shiono, N. et al ● „ Method of Determining Reliability Screens for Time Dependent Dielectric Breakdown “ Crook, D.L. et al ● „Circuit Reliability: From Physics to Architectures.“ Fang, j. et al (good overview, ICCAD 2012) ● [Schro04] „Negative Bias temperature instability: What do we understand?“ Dieter K. Schroder 30/31

  31. Sources ● http://www.iue.tuwien.ac.at/phd/entner/ ● „Reliability Physics and Engineering: Time-To- Failure Modeling.“ J. W. McPherson, Springer Science & Business Media, 2010 31/31

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