Embedded Processors Overview Design features Design features AMBA - PowerPoint PPT Presentation

Advanced Digital IC Design Contents Embedded Processors Embedded Processors � Overview � Design features � Design features AMBA Bus AMBA Bus System � Why AMBA Dalia Iurascu � AMBA AHB, APB Structure Alejandro Vázquez Bofill � AMBA Test Interface Conclusions Lund University References Dalia Iurascu, Alejandro Vazquez Bofill Dalia Iurascu, Alejandro Vazquez Bofill What is an Embedded Processor? Shipment of Embedded Processors “Embedded” into a device, it delivers real-time behavior in power sensitive applications. Architecture as: Motorola 68000 (68K) , Intel x86, AMD 29000(29K), Intel i960. J. Hennessy, “The Future of Systems Research” Dalia Iurascu, Alejandro Vazquez Bofill Dalia Iurascu, Alejandro Vazquez Bofill Dalia Iurascu, Alejandro Vazquez Bofill

Usage W here are the em bedded devices? � Consumer electronics http://www.eit.lth.se � Communication � Automotive Dalia Iurascu, Alejandro Vazquez Bofill Dalia Iurascu, Alejandro Vazquez Bofill Why is this important? Characteristics Application Specific Processors Static Structure Non-homogeneous www.techweekeurope.co.uk/news/ Give products programmability and flexibility Eliminate components Potential for future product upgrades(embedded software update) Dalia Iurascu, Alejandro Vazquez Bofill Dalia Iurascu, Alejandro Vazquez Bofill Dalia Iurascu, Alejandro Vazquez Bofill

Good Embedded Processors Num ber of em bedded processor cores Power Dalia Iurascu, Alejandro Vazquez Bofill Dalia Iurascu, Alejandro Vazquez Bofill Good Embedded Processors μ P/ μ C/DSP μ C � single chip Performance � memory , I/O ports � memory , I/O ports � Latency � Latency � CISC processors � Bandwidth (throughput) μ P � CPU � memory , I/O ports to be connected externally Cost � RISC � Area DSP � Complexity � specialized microprocessor � designed for digital signal processing real time � Dalia Iurascu, Alejandro Vazquez Bofill Dalia Iurascu, Alejandro Vazquez Bofill Dalia Iurascu, Alejandro Vazquez Bofill

DSP-advantages Nios II Embedded Processor � Most used processor in Versatility the FPGA industry � Reprogrammed for other applications � Five-Stage pipelined general-purpose RISC microprocessor Repeatability � Easily duplicated � Supports both 32-bit and 16-bit architectural variants Simplicity � Both utilize a 16-bit instruction format to reduce code footprint and instruction memory bandwidth Dalia Iurascu, Alejandro Vazquez Bofill Dalia Iurascu, Alejandro Vazquez Bofill Nios II ARM-ISA Load-Store RISC Architecture Configurable 32 bit Architecture 32 bit Architecture Easily combined with user logic and programmed into a l b d h l d d PLD All instructions are predicated Advanced features, such as custom instructions 16 Registers Simultaneous multi-master Avalon bus R0-R14-general purpose register R15-program counter Powerful processing solution 32 bit instructions Dalia Iurascu, Alejandro Vazquez Bofill Dalia Iurascu, Alejandro Vazquez Bofill Dalia Iurascu, Alejandro Vazquez Bofill

ARM Embedded Processors Cortex M3 � High performance � Architectural 32-bit CPU simplicity � Develop high l h h � Small performance low-cost implementations platforms � Very low power � RISC processor core consumption � Low latency 3- � Low latency 3 stage pipeline � Optimal blend of 16/32-bit instructions Dalia Iurascu, Alejandro Vazquez Bofill Dalia Iurascu, Alejandro Vazquez Bofill AMBA-ARM designed Why AMBA? Advanced Microcontroller Bus Architecture Design for low power consumption � On-Chip communication standard � Partitioning high and low-bandwidth devices � Signal protocol-connect multiple blocks in SOC � Signal protocol connect multiple blocks in SOC � Low costs � Low costs � High-performance bus standard � High speed cache interfaces Test access � Integrate optional on-chip test access methodology AMBA � Reuses the basic bus infrastructure � AHB(Advanced High Performance) � ASB(Advanced System Bus) Support of multiple development platforms � APB(Advanced Peripheral Bus) � Easier to port real time kernel software Dalia Iurascu, Alejandro Vazquez Bofill Dalia Iurascu, Alejandro Vazquez Bofill Dalia Iurascu, Alejandro Vazquez Bofill

ARM AMBA Bus AMBA Bus(cont.) High speed bus(ASB or AHB) for CPU High speed bus(ASB or AHB) for CPU Fast memory and DMA Bus for peripherals(APB) � Connected via a bridge to the high-speed bus www.citeseerx.ist.psu.edu/ Dalia Iurascu, Alejandro Vazquez Bofill Dalia Iurascu, Alejandro Vazquez Bofill AHB/APB ASB AHB APB High performance High performance Low power p Pipelined operation Pipelined operations Latched address and control Burst transfer Multiple bus masters Simple Interface Multiple Bus Masters Burst transfers Suitable for many Split transactions peripherals Bus width: 8,16,32 bits Bus width 8,16,32,64,128 bits Dalia Iurascu, Alejandro Vazquez Bofill Dalia Iurascu, Alejandro Vazquez Bofill Dalia Iurascu, Alejandro Vazquez Bofill

AMBA AHB Structure AMBA AHB Structure(cont.) Initiate request to Used with central multiplexer interconnection scheme arbiter Bus master drive out the address and control signal Bus master drive out the address and control signal Arbiter � Ensures that only one bus master has access to the bus � Each bus master can request the bus, the arbiter decides which has the highest priority and issues a d id hi h h th hi h t i it d i grant signal accordingly http://www.ijest.info/docs/IJEST10-02-05-105.pdf Dalia Iurascu, Alejandro Vazquez Bofill Dalia Iurascu, Alejandro Vazquez Bofill AMBA AHB Structure(cont.) AMBA AHB Architecture Decoder � Decode the address of each transfer � Select the signals from the slave � Select the signals from the slave Master : � • Initiate read and write operations • Provide address and control information • Only one bus master use actively the bus at one time � Slave : • Respond to a read/write operation http://www.ijest.info/docs/IJEST10-02-05-105.pdf Dalia Iurascu, Alejandro Vazquez Bofill Dalia Iurascu, Alejandro Vazquez Bofill Dalia Iurascu, Alejandro Vazquez Bofill

APB Components APB Components(cont.) AHB to APB Bridge � Latching of all APB Slaves address, data and control signals � Un-Pipelined � Un Pipelined � Zero power interface � Drive data for a write transfer � Write data valid for the whole access � Drive data for a � D i d t f read transfer http://polimage.polito.it/~lavagno/esd/IHI0011A_AMBA_SPEC.pdf http://polimage.polito.it/~lavagno/esd/IHI0011A_AMBA_SPEC.pdf Dalia Iurascu, Alejandro Vazquez Bofill Dalia Iurascu, Alejandro Vazquez Bofill ARM7 Processor AMBA Test Interface Courtesy “AMBA 2.0” � Provides access to inputs/outputs of peripheral that are not directly connected to the bus http://www.cs.umich.edu/~prabal/teaching/eecs373-f10/readings/flynn97amba.pdf Dalia Iurascu, Alejandro Vazquez Bofill Dalia Iurascu, Alejandro Vazquez Bofill Dalia Iurascu, Alejandro Vazquez Bofill

TIC(Test Interface Controller) Inputs for Test Interface TCLK � Test clock input signal � Must not glitch TREQA � Test bus request A � Request entry into the test mode Courtesy “AMBA 2.0” � Convert the external test vector into internal bus transfer Dalia Iurascu, Alejandro Vazquez Bofill Dalia Iurascu, Alejandro Vazquez Bofill Inputs(cont.) Conclusions TREQB � Test bus request B � Type of test vector in the following cycle � Type of test vector in the following cycle Em bedded processors Widely used and sold TACK � Gives external indication that test bus has been granted Customized for a specific application TBUS-bidirectional Typically have fewer resources compared with General purpose processors � Apply address ,control write vectors Dalia Iurascu, Alejandro Vazquez Bofill Dalia Iurascu, Alejandro Vazquez Bofill Dalia Iurascu, Alejandro Vazquez Bofill

Conclusions-AMBA References [1] S .Cotofana, St.Wong, St. Vassiliadis, “Embedded Processors: AMBA Bus Characteristics and Trends” Bus-excellent communication medium to connect Bus excellent communication medium to connect [2] David Flynn, AMBA :Enabling reusable On-Chip Design [2] David Flynn ”AMBA :Enabling reusable On Chip Design” several devices [3] Jörg Henkel, Sri Parameswaran, Newton Cheung, ”Application- Speci fi c Embedded Processors” Shared communication-bottleneck in the system [4] http://embeddedsystemnews.com Technology independent [5]http://www.eetimes.com/discussion/analystscorner/4025062/Com paring-embedded-processors Ensures that highly reusable peripheral can be migrated across a diverse range of IC processes Dalia Iurascu, Alejandro Vazquez Bofill Dalia Iurascu, Alejandro Vazquez Bofill References [7] http://www.ehow.com/facts_6878538_embedded- processor-definition.html [8] www. citeseerx.ist.psu.edu Thank you [9] http://www.esacademy.com/assets/faqs/primer/2.htm Questions? [10] www.cs.ucr.edu/Yang lec5.ppt [11]http://blogs.mentor.com/verificationhorizons/blog/20 11/03/31/part-2-the-2010-wilson-research-group- functional-verification-study Dalia Iurascu, Alejandro Vazquez Bofill Dalia Iurascu, Alejandro Vazquez Bofill Dalia Iurascu, Alejandro Vazquez Bofill