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3D Si Pixels for the LHC upgrade Test beam set-up Interior pixel response Charge sharing Active edge Capacitance concerns Irradiation test Conclusion Edge Characterization of 3D Silicon Sensors after Bump-Bonding with the ATLAS Pixel


  1. 3D Si Pixels for the LHC upgrade Test beam set-up Interior pixel response Charge sharing Active edge Capacitance concerns Irradiation test Conclusion Edge Characterization of 3D Silicon Sensors after Bump-Bonding with the ATLAS Pixel Readout Chip Ole Myren Røhne 1 on behalf of the ATLAS 3D Pixel Collaboration 1University of Oslo IEEE 2008 Nuclear Science Symposium

  2. 3D Si Pixels for the LHC upgrade Test beam set-up Interior pixel response Charge sharing Active edge Capacitance concerns Irradiation test Conclusion Outline 3D Si Pixels for the LHC upgrade Test beam set-up Interior pixel response Charge sharing Active edge Capacitance concerns Irradiation test

  3. 3D Si Pixels for the LHC upgrade Test beam set-up Interior pixel response Charge sharing Active edge Capacitance concerns Irradiation test Conclusion ATLAS 3D Pixel R&D Collaboration “Development, Testing and Industrialization of Full-3D Active-Edge and Modified-3D Silicon Radiation Pixel Sensors with Extreme Radiation Hardness for the ATLAS experiment” Participating institutions: 13 Bonn University, Freiburg University, University of Genova, Glasgow University, the University of Hawaii, Lawrence Berkeley National Laboratory, Manchester University, the University of New Mexico, University of Oslo, the Czech Technical University, University of Bergen, SLAC and CERN Industrial partners: 4 CNM/Valencia Spain, ICEMos Northern Ireland, IRST/FBK Italy and SINTEF Norway Topics and goals The primary goal is the development, fabrication, characterization, and testing, with and without the front-end readout chip, of Full-3D — active-edge and Mod-3D silicon pixel sensors of extreme radiation hardness and high speed for the Super-LHC ATLAS upgrade and, possibly, the ATLAS B-layer replacement. A secondary goal is to start design work for a reduced material B-layer detector module using these sensors.

  4. 3D Si Pixels for the LHC upgrade Test beam set-up Interior pixel response Charge sharing Active edge Capacitance concerns Irradiation test Conclusion Stanford 3D ATLAS Pixel compatible sensor Design and fabrication Substrate Financial support Thickness 210 µ m J. Hasi, Manchester STFC, UK (FP420 project) P-type substrate 12 kΩcm C. Kenney, MBC at CIS-Stanford DOE, USA (ATLAS upgrade) Baby-2E Baby-3E 10 wafers completed, yield ≃ 80% (1 wafer)

  5. 3D Si Pixels for the LHC upgrade Test beam set-up Interior pixel response Charge sharing Active edge Capacitance concerns Irradiation test Conclusion 3D sensors: technology and principles Technology • MEMS + VLSI applied to sensor design: Deep Reactive Ion Etching (DRIE) • Aspect ratio AR = D / d in excess of 20 • Electrodes: etched, doped, filled columns (S. Parker 1995) • Edges: etched, doped trench (C. Kenney 1997) • Benefits: Radiation hardness and active edges Principles • Horizontal drift field, decoupling • Sensor thickness (total charge) • Inter-electrode distance (signal efficiency) • Etched and doped edge terminates the field • No guard rings • Fully efficient up to the edge • Precision etch replaces dicing

  6. 3D Si Pixels for the LHC upgrade Test beam set-up Interior pixel response Charge sharing Active edge Capacitance concerns Irradiation test Conclusion 3D Sensors: precision etched active edge Novel module layout: Tiled array with minimum dead area

  7. 3D Si Pixels for the LHC upgrade Test beam set-up Interior pixel response Charge sharing Active edge Capacitance concerns Irradiation test Conclusion Test beam set-up Devices-under-Test (DUT): 3E and 4E 3D Pixel sensors from Stanford and Manchester, bonded to the ATLAS Pixel FE-I3 read-out chip Beam • CERN SPS North-area H6 test beam • Minimum ionizing particles (MIP): 180 GeV / c π ± • Beam period: June 2008 Trigger and timing • Overlap coincidence • Veto counter for shower suppression • Trigger phase measurement (TDC) Bonn ATLAS Telescope (BAT) • Developed for ATLAS Pixel test beams • Two-sided Si micro-strip • Strip pitch: 50 µ m , analog read-out • Point resolution: 5 µ m (estimated)

  8. 3D Si Pixels for the LHC upgrade Test beam set-up Interior pixel response Charge sharing Active edge Capacitance concerns Irradiation test Conclusion Stanford 3E ( − 40 V ): Single hit residual • Charge sharing is suppressed, most tracks fire a single 50 µ m × 400 µ m pixel • Convolution of 3 contributions: pixel response, tracking resolution, residual misalignment • Fitted edge resolution: 11 µ m • Expect ≃ 8 µ m from tracking alone 2500 18000 16000 2000 14000 12000 1500 10000 8000 1000 6000 500 4000 2000 0 0 -400 -300 -200 -100 0 100 200 300 400 -400 -300 -200 -100 0 100 200 300 400

  9. 3D Si Pixels for the LHC upgrade Test beam set-up Interior pixel response Charge sharing Active edge Capacitance concerns Irradiation test Conclusion Stanford 3E ( − 40 V ): Interior cell response Layout detail 100 1 Efficiency map 50 0.5 0 0 200 400 600 800 0 1 � ǫ � = 92% (prelim) 0.5 0 0 200 400 600 800 Charge distribution - close to read-out electrode Charge distribution - close to read-out electrode Charge distribution - suppressed read-out electrode Charge distribution - suppressed read-out electrode Entries 434895 Entries 26021 30000 Mean 55.73 Mean 49.24 1400 RMS 23.87 RMS 27.07 25000 1200 1000 20000 800 Column area 15000 signal: 27 . 2% 600 10000 400 5000 200 0 0 0 20 40 60 80 100 120 140 160 180 200 0 20 40 60 80 100 120 140 160 180 200

  10. 3D Si Pixels for the LHC upgrade Test beam set-up Interior pixel response Charge sharing Active edge Capacitance concerns Irradiation test Conclusion Stanford 4E ( − 40 V ): Interior cell response Layout detail 100 1 Efficiency map 50 0.5 0 0 200 400 600 800 0 1 � ǫ � = 90% (prelim) 0.5 0 0 200 400 600 800 Charge distribution - close to read-out electrode Charge distribution - close to read-out electrode Charge distribution - suppressed read-out electrode Charge distribution - suppressed read-out electrode Entries 341478 Entries 27438 Mean 50.77 Mean 42.85 25000 RMS 22.67 RMS 26.53 1400 1200 20000 1000 15000 Column area 800 signal: 26 . 7% 10000 600 400 5000 200 0 0 0 20 40 60 80 100 120 140 160 180 200 0 20 40 60 80 100 120 140 160 180 200

  11. 3D Si Pixels for the LHC upgrade Test beam set-up Interior pixel response Charge sharing Active edge Capacitance concerns Irradiation test Conclusion Stanford 3E ( − 40 V ): Charge sharing Layout detail 100 1 0.9 0.8 0.7 0.6 Split clusters 50 0.5 0.4 0.3 0.2 0.1 0 0 200 400 600 800 0 1 � q � = 14% 0.5 (prelim) 0 0 200 400 600 800

  12. 3D Si Pixels for the LHC upgrade Test beam set-up Interior pixel response Charge sharing Active edge Capacitance concerns Irradiation test Conclusion Stanford 4E ( − 40 V ): Charge sharing Layout detail 100 1 0.9 0.8 0.7 0.6 Split clusters 50 0.5 0.4 0.3 0.2 0.1 0 0 200 400 600 800 0 1 � q � = 11% 0.5 (prelim) 0 0 200 400 600 800

  13. 3D Si Pixels for the LHC upgrade Test beam set-up Interior pixel response Charge sharing Active edge Capacitance concerns Irradiation test Conclusion Stanford 3E ( − 40 V ): Edge response Layout detail 100 1 Efficiency map 50 0.5 0 0 200 400 600 800 0 1 Fitted edge µ = 68 . 1 µ m 0.5 σ = 12 . 0 µ m 0 0 200 400 600 800 100 1 0.9 0.8 0.7 0.6 Split clusters 50 0.5 0.4 0.3 0.2 0.1 0 0 200 400 600 800 0

  14. 3D Si Pixels for the LHC upgrade Test beam set-up Interior pixel response Charge sharing Active edge Capacitance concerns Irradiation test Conclusion Stanford 4E ( − 40 V ): Edge response Layout detail 100 1 Efficiency map 50 0.5 0 0 200 400 600 800 0 1 Fitted edge µ = 82 . 5 µ m 0.5 σ = 10 . 5 µ m 0 0 200 400 600 800 100 1 0.9 0.8 0.7 0.6 Split clusters 50 0.5 0.4 0.3 0.2 0.1 0 0 200 400 600 800 0

  15. 3D Si Pixels for the LHC upgrade Test beam set-up Interior pixel response Charge sharing Active edge Capacitance concerns Irradiation test Conclusion Stanford 4E: Capacitance concerns Measurements (C. DaVia, IEEE NSS 2007) indicate the capacitance plateau reached only well above the theoretical full depletion voltage. The resulting timewalk/overdrive is higher than for planar devices ( Q 20ns = 1244 e ). Mitigation of efficiency loss expected from less charge sharing in 3D sensors. 300 ns 280 260 − 50 V 240 Noise (lab) ENC = 290 e 220 200 Overdrive (lab) Q 20ns = 3340 e 180 Overdrive (beam) Q 20ns = 3920 e (prelim) 160 140 120 100 0 10 20 30 40 50 60 70 80 90 100 ToT 300 ns 280 260 − 15 V 240 Noise (lab) ENC = 340 e 220 200 Overdrive (lab) − 180 Overdrive (beam) Q 20ns = 5040 e (prelim) 160 140 120 100 0 10 20 30 40 50 60 70 80 90 100 ToT

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