display technology cathode ray tube
play

Display Technology Cathode Ray Tube Images stolen from various - PDF document

Display Technology Cathode Ray Tube Images stolen from various locations on the web... Cathode Ray Tube Raster Scanning Electron Gun Beam Steering Coils 1 Color Shadow Mask and Aperture Grille Liquid Crystal Displays Liquid Crystal


  1. Display Technology Cathode Ray Tube � Images stolen from various locations on the web... Cathode Ray Tube Raster Scanning Electron Gun Beam Steering Coils 1

  2. Color Shadow Mask and Aperture Grille Liquid Crystal Displays Liquid Crystal Displays DLP Projector LCoS � Liquid Crystal on Silicon � Put a liquid crystal between a reflective layer on a silicon chip 2

  3. Grating Light Valve (GLS) Grating Light Valve (GLS) � lots (8000 currently) of micro ribbons that can bend slightly � Make them reflective � The bends make a diffraction grating that controls how much light where � Scan it with a laser for high light output � 4000 pixel wide frame ever 60Hz Digistar 3 Dome Projector VGA � Stands for Video Graphics Array � A standard defined by IBM back in 1987 � 640 x 480 pixels � Now superseded by much higher resolution standards... � Also means a specific analog connector � 15-pin D-subminiature VGA connector VGA Connector Raster Scanning 1 : Red out 6 : Red return (ground) 11 : Monitor ID 0 in 2 : Green out 7 : Green return (ground) 12 : Monitor ID 1 in or data from display 3 : Blue out 8 : Blue return (ground) 13 : Horizontal Sync 4 : Unused 9 : Unused 14 : Vertical Sync 5 : Ground 10 : Sync return (ground) 15 : Monitor ID 3 in or data clock 3

  4. VGA Timing VGA Timing Horizonal Dots 640 Horizonal Dots 640 Vertical Scan Lines 480 60Hz vertical frequency Vertical Scan Lines 480 60Hz vertical frequency Horiz. Sync Polarity NEG Horiz. Sync Polarity NEG A ( μ s) 31.77 Scanline time A ( μ s) 31.77 Scanline time B ( μ s) 3.77 Sync pulse length B ( μ s) 3.77 Sync pulse length C ( μ s) 1.89 Back porch C ( μ s) 1.89 Back porch D ( μ s) 25.17 Active video time D ( μ s) 25.17 Active video time E ( μ s) 0.94 Front porch E ( μ s) 0.94 Front porch 25.17/640 = 39.33ns/pixel = 25.4MHz pixel clock ______________________ ________ ______________________ ________ ________| VIDEO |________| VIDEO (next line) ________| VIDEO |________| VIDEO (next line) |-C-|----------D-----------|-E-| |-C-|----------D-----------|-E-| __ ______________________________ ___________ __ ______________________________ ___________ |_| |_| |_| |_| |B| |B| |---------------A----------------| |---------------A----------------| VGA Timing Relaxed VGA Timing Horizonal Dots 640 � This all sounds pretty strict and exact... Vertical Scan Lines 480 � It’s not really... The only things a VGA Vert. Sync Polarity NEG monitor really cares about are: Vertical Frequency 60Hz O (ms) 16.68 Total frame time � Hsync P (ms) 0.06 Sync pulse length � Vsync Q (ms) 1.02 Back porch � Actually, all it cares about is the falling edge R (ms) 15.25 Active video time of those pulses! S (ms) 0.35 Front porch ______________________ ________ � The beam will retrace whenever you tell it to ________| VIDEO |________| VIDEO (next frame) |-Q-|----------R-----------|-S-| � It’s up to you to make sure that the video __ ______________________________ ___________ signal is 0v when you are not painting |_| |_| |P| (i.e. retracing) |---------------O----------------| Relaxed VGA Timing VGA Timing Horizonal Dots 128 Horizonal Dots 128 Vertical Scan Lines ? 60Hz vertical frequency Vertical Scan Lines 255 Horiz. Sync Polarity NEG Vert. Sync Polarity NEG A ( μ s) 30.0 Scanline time Vertical Frequency 60Hz B ( μ s) 2.0 Sync pulse length O (ms) 16.68 Total frame time P (ms) 0.09 Sync pulse length (3x30 μ s) C ( μ s) 10.7 Back porch Q (ms) 4.86 Back porch D ( μ s) 12.8 Active video time R (ms) 7.65 Active video time E ( μ s) 4.50 Front porch S (ms) 4.08 Front porch 12.8/128 = 100ns/pixel = 10 MHz pixel clock ______________________ ________ ______________________ ________ ________| VIDEO |________| VIDEO (next line) ________| VIDEO |________| VIDEO (next frame) |-C-|----------D-----------|-E-| |-Q-|----------R-----------|-S-| __ ______________________________ ___________ __ ______________________________ ___________ |_| |_| |_| |_| |B| |P| |---------------A----------------| |---------------O----------------| 4

  5. VGA Voltage Levels VGA Voltage Levels � Voltages on R, G, and B determine the � Voltages on R, G, and B determine the color color � Analog range from 0v (off) to +0.7v (on) � Analog range from 0v (off) to +0.7v (on) � But, our pads produce 0-5v outputs! � But, our pads produce 0-5v outputs! � For B&W output, just tie RGB together and let 0v=black and 5v=white � overdrives the input amps, but won’t really hurt anything � For color you can drive R, G, B separately � Of course, this is only 8 colors (including black and white) � Requires storing three bits at each pixel location More colors More Colors (Xess) � More colors means more bits stored per pixel � Also means D/A conversion to 0 to 0.7v range What to Display? CharROM � You need data to display on the screen... � Brute force: put it all in a giant ram that has the same resolution as your screen and just walk through the RAM as you paint the screen � More clever: Fill a row buffer with data for a scan line � Multi-level: Fill a (smaller) row buffer with pointers to glyphs that are stored in another RAM/ROM � Just keep track of where the beam is and where your data is... 5

  6. CharROM Two Lines of Text � 16 characters/line x 8 pixels/char = 128pixels � 6 bits to address a character � A[4:3] = row of CharRom � R[2:0] = column of CharRom � A[2:0] = row of character RAM/ROM Generator ROM vs. Verilog � Designed by Allen Tanner 4 years ago as his class project... � makemem � Simple SRAM and ROM arrays ROM vs. Verilog ROM vs. Verilog 6

  7. ROM vs. Verilog ROM vs. Verilog ROM vs. Verilog ROM vs. Verilog makemem Limits makemem 102 vladimir:~> java -cp /uusoc/facility/cad_common/local/Cadence/lib/mem/j makemem -h � Number of rows is limited to 64 by makemem v2.2 Nov 8, 2004 Allen Tanner University of Utah CS6710 address decoder design Enter the following: � Columns are not restricted java makemem choice options Where: choice selects the creation of either ROM or SRAM. � For ROM you can add a tristate bus at for ROM enter:-r rname : rname.rom is the file name. : the output which ia another level of for SRAM enter:-s r c : Version 1 SRAM single port. for SRAM enter:-s1 r c : Version 2 SRAM single port. decoding for SRAM enter:-s2 r c : Version 2 SRAM dual port. for SRAM enter:-s3 r c : Version 2 SRAM triple port. : r is the number of rows (decimal). � width must be an even number : c is the number of columns (decimal). : � SRAM has single, dual, and triple port :-h -H : help (no processing occurs when help is requested). :-f fname : output file name. Used with .cif, .v & .il files. options :-n sname rname : sname for array top cell name. : : rname for ROM (only) dockable ROM array top cell name :-t n : use tristate buffers on the outputs of ROM. :-q : output hello.txt file to find the working file directory. 103 vladimir:~> 7

Recommend


More recommend