CSE141: Introduction to Computer Architecture Hung-Wei Tseng - PowerPoint PPT Presentation

CSE141: Introduction to Computer Architecture Hung-Wei Tseng

CSE141: Let’s say something! • What’s your name? • What’s the most exciting thing you did so far this summer? • What’s the most interesting computer science topic for you? 2

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We want faster and faster computers! 4

What is “architecture” "Architecture." Merriam-Webster.com. Merriam-Webster, n.d. Dec 18 2018. <http://www.merriam-webster.com/dictionary/architecture>. • 5

Computer architecture? Architecture the art or science of building computers 6

Outline • What are inside computers? • Von Neumann architecture • Current state of CPU architectures • Why is CSE141 important? • What’s in this class? 7

What are inside Computers 8

Modern computers DRAM CPU+DR DRAM AM CPU CPU The same spirit, but different DRAM DRAM CPU implementations CPU DRAM DRAM CPU CPU CPU+DR DRAM AM DRAM CPU DRAM DRAM CPU 9

Desktop PC SATA Memory CPU Socket PCIe PCI I/O connectors 10

Server Memory Memory PCIe CPU CPU Socket Socket Memory Memory CPU CPU Socket Socket 11

Macbook Pro w/ Retina System Connectors Memory Hub CPU SSD Slot 12

iPhone CPU + Sim Peripherals DRAM Peripherals Card 13

PS4 Memory CPU+ Memory GPU Peripherals Memory Connectors 14

Processor/memory is everywhere! 15

Processors/CPUs for computers 16

Memory/storage for computers 17

The computer is now like a small network DRAM Processor GPU Accelerator processor-memory bus FPGA/ASIC NVMe SSD Wireless NIC SATA SSD HDD NIC 18

In the beginning … 19

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Difference engine 1822: English mathematician Charles Babbage conceives of a steam-driven calculating machine that would be able to compute tables of numbers. 21

ENIAC You have to change the physical hardware configuration ENIAC(Electronic Numerical Integrator And Computer) was the first electronic general-purpose computer. It was Turing-complete, digital, and could solve "a large class of numerical problems" through reprogramming. 22

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Von Neumann Architecture & modern computers 24

Von Neumann architecture memory 8 CPU is a dominant factor of performance since we heavily rely on it to execute programs 2 3 By pointing “PC” to different part of your memory, we can perform different functions! 25

Memory You can only store 0 or 1 in each memory cell 26


 
 
 
 Representing a positive number • Assume that we have 4 bits 
 Decimal Binary Decimal Binary 0 0000 4 0100 1 0001 5 0101 2 0010 6 0110 3 0011 7 0111 • Example binary arithmetic 3 + 2 = 5 3 + 3 = 6 1 carry 1 1 0 0 1 1 0 0 1 1 + 0 0 1 0 + 0 0 1 1 0 0 1 0 1 1 1 0 27

2’s complement • Guidelines Obvious representation of 0, 1, 2, ...... • Efficient usage of number space Does not waste 1111 anymore • Equal coverage of positive and negative numbers • Easy hardware design • • 1‘s complement + 1 = 2’s complement Invert every bit, then + 1 • -1 = b‘1110 + b’1 = b‘1111 • Decimal Binary Decimal Binary 0 0000 -1 1111 1 0001 -2 1110 2 0010 -3 1101 3 0011 -4 1100 4 0100 -5 1011 5 0101 -6 1010 6 0110 -7 1001 7 0111 -8 1000 28

Evaluating 2’s complement • Do we need a separate procedure/hardware for adding positive and negative numbers? • • 3 + 2 = 5 
 3 + (-2) = 1 
 1 1 1 1 0 0 1 1 0 0 1 1 + 0 0 1 0 + 1 1 1 0 0 1 0 1 0 0 0 1 = 1 A. No. The same procedure applies B. No. The same “procedure” applies but it changes overflow detection C. Yes, and we need a new procedure D. Yes, and we need a new procedure and a new hardware E. None of the above 
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Full ALU CI B invert Operation ADD 0 0 2 SUB 1 1 2 AND 0 0 0 OR 0 0 1 SLT 0 0 3 sign bit (adder output from bit 31) 30

IEEE 754 standard floating point S E (8 bits) M (23 bits) • S: sign bit • Actual Exponent: E - 127 • Mantissa Normalized binary significand • Hidden integer bit: 1 • The actual mantissa is 1.M • • 0 01111110 10000000000000000000000 b‘1.1 = 1+1*2 -1 = 1.5 b‘01111110=126 
 126 - 127 = -1 1.5 * 2 -1 = 0.75 31

FP add hardware 32

Encoding an R-format instruction 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 R-format opcode rs rt rd shift amount function add $v0, $a1, $a2 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 00010 00110 000000 00101 00000 100000 opcode rs rt rd shift amount function 33

Dive into the circuit a bit registers ALU $0 each of them has $at Processor $v0 different structure ........ PC — different timing $ra memory 4-bit ALU Register file 34

Clock — synchronizing hardware components • A hardware signal defines when data for any specific component is ready to use by others Think about the clock in real life! • • We use edge-triggered clocking Values stored in the sequential logic is updated only on a clock edge • clock cycle Register memory 4-bit ALU file 35

Don’t worry — We are not going to talk about the previous 10 slides in detail 36

How CPU handle instructions • Instruction fetch: where? 
 registers ALU $0 program counter & instruction memory $at Processor $v0 • Decode: ........ PC What’s the instruction? • $ra registers instruction memory Where are the operands? • 120007a30: 0f00bb27 ldah gp,15(t12) 120007a34: 509cbd23 lda gp,-25520(gp) • Execute ALUs 120007a38: 00005d24 ldah t1,0(gp) 120007a3c: 0000bd24 ldah t4,0(gp) • Memory access 120007a40: 2ca422a0 ldl t0,-23508(t1) 120007a44: 130020e4 beq t0,120007a94 120007a48: 00003d24 ldah t0,0(gp) Where is my data? data memory • 120007a4c: 2ca4e2b3 stl zero,-23508(t1) • Write back registers 800bf9000: 00c2e800 12773376 data memory 800bf9004: 00000008 8 
 Where to put the result • 800bf9008: 00c2f000 12775424 
 800bf900c: 00000008 8 • Determine the next PC 800bf9010: 00c2f800 12777472 
 800bf9014: 00000008 8 
 800bf9018: 00c30000 12779520 
 800bf901c: 00000008 8 37

Current state of CPU architectures 38

Moore’s Law (1) • The number of transistors we can build in a fixed area of silicon doubles every 12 ~ 24 months. 10,000,000,000 1,000,000,000 100,000,000 10,000,000 Moore’s Law is the Transistor Count 1,000,000 most important 100,000 driver for historic 10,000 CPU performance 1,000 100 gains 10 1 1970 1975 1980 1985 1990 1995 2000 2005 2010 2015 (1) Moore, G. E. (1965), 'Cramming more components onto integrated circuits', Electronics 38 (8) . 39