Computer Architecture • A modern meaning of the term computer architecture covers CSE 675.02: three aspects of computer design: – instruction set architecture, Introduction to Computer – computer organization and Architecture – computer hardware. • Instruction set architecture - ISA refers to the actual programmer visible machine interface such as instruction set, registers, memory organization and exception (i.e. interrupt) handling. Instructor: Roger Crawfis One can think of a ISA as a hardware functionality of a given computer. (based on slides from Gojko Babic 9/21/2005 g. babic Presentation A 2 Computer Organization and Hardware Tasks of Computer Architects • A computer organization and computer hardware are two • Computer architects must design a computer to meet functional components of the implementation of a machine. requirements as well as price, power, and performance goals. Often, they also have to determine what the functional require- • Computer organization includes the high-level aspects of ments are, which can be a major task. a design, such as the memory system, the bus structure, and • Once a set of functional requirements has been established, the design of the internal CPU (where arithmetic, logic, the architect must try to optimize the design. Here are three branching and data transfers are implemented). major application areas and their main requirements: – Desktop computers: focus on optimizing cost-performance • Computer hardware refers to the specifics of a machine, as measured by a single user, with little regard for program included the detailed logic design and the packaging size or power consumption, technology of the machine. – Server computers – focus on availability, scalability, and throughput cost-performance, – Embedded computers – driven by price and often power issues, plus code size is important. g. babic Presentation A 3 g. babic Presentation A 4
Rapid Rate of Improvements Technology Trends • Integrated circuit logic technology – a growth in transistor • Today, less than one thousand dollars purchases a personal count on chip of about 55% per year. computer that has more performance, more main memory, and more disk storage than a computer bought in 1980 for • Semiconductor RAM – density increases by 40% to 60% per one million dollars. year, while cycle time has improved very slowly, decreasing by about one-third in 10 years. Cost has decreased at rate • For many applications, the highest-performance microcom- about the rate at which density increases. puters of today outperform the supercomputers of less than • Magnetic disc technology – disk density has been recently 10 years ago. improving more then 100% per year, while prior to 1990 about 30% per year. • This rapid rate of improvement has come from two forces: • Network technology – Latency and bandwidth are important, – technology used to build computers and though recently bandwidth has been primary focus. Internet infrastructure in the U.S. has been doubling in bandwidth – innovations in computer design. every year. g. babic Presentation A 5 g. babic Presentation A 6 Developments in Computer Design How CPUs get faster • During the first 25 years of electronic computers both forces, technology and innovations in computer design made major contributions. • Then, during the 1970’s, computer designers were largely dependent upon integrated circuit technology, with roughly 35% growth per year in processor performance. • In the last 20 year, the combination of innovations in computer design and improvements in technology has led sustained growth in performance at an annual rate of over 55%. In this period, the main source of innovations in computer design has come from RISC-style pipelined processors. g. babic Presentation A 7 8 Scientific American Nov 04
Growth in Microprocessor Performance Approaches to Instruction Set Architecture • For many years the interaction between ISA and implementat- ions was believed to be small, and implementation issues were not a major focus in designing instruction set architecture. • In the 1980’s, it becomes clear that both the difficulty of designing processors and performance inefficiency of processors could be increased by instruction set architecture complications. • Two main approaches of ISA: – RISC (Reduced Instruction Set Computer) architecture – CISC (Complex Instruction Set Computer) architecture. g. babic Presentation A 9 g. babic Presentation A 10 RISC Architecture RISC ISA Characteristics RISC – R educed I nstruction S et C omputer • All operations on data apply to data in registers and typically change the entire register; After 1985, most computers announced have been of RISC • The only operations that affect memory are load and store architecture. RISC designers focused on two critical operations that move data from memory to a register or to performance techniques in computer design: memory from a register, respectively; – the exploitation of instruction-level parallelism, first • A small number of memory addressing modes; through pipelining and later through multiple instruction issue, • The instruction formats are few in number with all instructions typically being one size; – the use of cache, first in simple forms and later using sophisticated organizations and optimizations. • Large number of registers; These simple properties lead to dramatic simplifications in the RISC architecture goals are ease of implementation (with implementation of advanced pipelining techniques, which is emphasis on concepts such as advanced pipelining) and why RISC architecture instruction sets were designed this way. compatibility with highly optimized compilers. g. babic Presentation A 11 g. babic Presentation A 12
CISC Architecture IA - 32 CISC – Complex (and Powerful) Instruction Set Computer • 1978: The Intel 8086 is announced (16 bit architecture) CISC goals, such as simple compilers and high code density, • 1980: The 8087 floating point coprocessor is added led to the powerful instructions, powerful addressing modes • 1982: The 80286 increases address space to 24 bits, +instructions and efficient instruction encoding. • 1985: The 80386 extends to 32 bits, new addressing modes • 1989-1995: The 80486, Pentium, Pentium Pro add a few instructions VAX processor was a good example of CISC architecture. For (mostly designed for higher performance) • 1997: 57 new “MMX” instructions are added, Pentium II example: accounting for all addressing modes and limiting to • 1999: The Pentium III added another 70 instructions (SSE) byte, word (16 bits) and long (32 bits), there are more than • 2001: Another 144 instructions (SSE2) 30,000 versions of integer add in VAX. • 2003: AMD extends the architecture to increase address space to 64 bits, widens all registers to 64 bits and other changes (AMD64) • 2004: Intel capitulates and embraces AMD64 (calls it EM64T) and adds more media extensions Question: What is today the main example of CISC architecture • “This history illustrates the impact of the “golden handcuffs” of compatibility processor? “adding new features as someone might add clothing to a packed bag” Answer: Intel IA-32 processors (found in over 90% desktop computers). “an architecture that is difficult to explain and impossible to love” g. babic Presentation A 13 Intel IA-32 Processors What Is This Course About? • Intel IA-32 processors, from 80386 processor in early 80’s to In this course we are going to learn basic principles of processor Pentium IV today are of CISC architecture. All Intel IA-32 and memory design using functionality of MIPS processor, i.e. processors are having as a core the identical instruction set we shall design processor-memory system with (a subset of) architecture designed in early 1980’s. MIPS instruction set architecture. • The improvements in technology have allowed the latest Somewhere some time ago, I read that MIPS processor is the Intel IA-32 processors (of CISC architecture) to adopt many best-selling RISC processor that powers everything from innovations first pioneered in the RISC design. Nintendo game machines and Cisco networking routers to • Since 1995, Pentium processors consist of a front end Silicon Graphics’ high-end servers and supercomputers. processor and a RISC-style processor. • The front end processor fetches and decodes Intel IA-32 What does MIPS stand for? complex instructions and maps them into microinstructions. A microinstruction is a simple instruction used in sequence Answer: M icroprocessor without I nterlocked P ipeline S tages. to implement a more complex instruction. Microinstructions MIPS processor is one of the first RISC processors. look very much as RISC instructions. • Then, the RISC-style processor executes microinstructions. g. babic Presentation A 16
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