CS 35101 Computer Architecture Spring 2008 Chapter 3 Part 1 - PowerPoint PPT Presentation

CS 35101 Computer Architecture Spring 2008 Chapter 3 Part 1 (3.1-3.3) Taken from Mary Jane Irwin (www.cse.psu.edu/~mji) and Kevin Schaffer [ adapted from D. Patterson slides ] CS35101 Ch3.Part1 1 Steinfadt SP08 KSU

Head’s Up  Last week’s material  Addressing modes; Assemblers, linkers and loaders  This week’s material  MIPS arithmetic and ALU design - Reading assignment – PH 3.1-3.5  Reminders  Project 1 is due Thursday, Feb 21st (by 11:55pm)  Exam 1 is Thursday, Feb 21st CS35101 Ch3.Part1 2 Steinfadt SP08 KSU

Architects write the checks that the design engineers have to cash. If the amount is too high, the whole project goes bankrupt. Design engineers must constantly juggle many conflicting demands: schedule, performance, power dissipation, features, testing, documentation, training and hiring. The Pentium Chronicles , Colwell, pg. 64 & 63 CS35101 Ch3.Part1 3 Steinfadt SP08 KSU

Data Types  Integers  Unsigned integers  Signed integers  Real numbers  Floating-point numbers  Fixed-point numbers  Strings CS35101 Ch3.Part1 4 Steinfadt SP08 KSU

Machine Number Representation  Bits are just bits (have no inherent meaning)  conventions define the relationships between bits and numbers  Binary numbers (base 2) - integers 0000 → 0001 → 0010 → 0011 → 0100 → 0101 → . . .  in decimal from 0 to 2 n -1 for n bits  Of course, it gets more complicated  storage locations (e.g., register file words) are finite, so have to worry about overflow (i.e., when the number is too big to fit into 32 bits)  have to be able to represent negative numbers, e.g., how do we specify -8 in addi $sp, $sp, -8 #$sp = $sp - 8 CS35101 Ch3.Part1 5 Steinfadt SP08 KSU

Unsigned Integers  Each bit b i has value b i × 2 i  Count from right to left starting at zero  Leftmost is most significant bit (MSB)  Rightmost is least significant bit (LSB)  To convert from binary to decimal, sum those values together  Repeated division by two can convert decimal to binary; the remainders form the binary number from right to left CS35101 Ch3.Part1 6 Steinfadt SP08 KSU

Unsigned Integers  At least lg n bits are required to represent an integer n  With k bits you can Representation Value represent integers from 0 to 000 0 2 k – 1 001 1 010 2 011 3 100 4 101 5 110 6 111 7 CS35101 Ch3.Part1 7 Steinfadt SP08 KSU

Signed Integers  Many ways to encode signed integers  Signed-magnitude  Biased  One's complement  Two's complement  In practice, two's complement is the most commonly used CS35101 Ch3.Part1 8 Steinfadt SP08 KSU

Signed-Magnitude  Explicit sign bit  Remaining bits encode unsigned magnitude Representation Value  Two representations for zero (+0 and -0) 000 +0  Addition and subtraction 001 +1 are more complicated 010 +2 011 +3 100 -0 101 -1 110 -2 111 -3 CS35101 Ch3.Part1 9 Steinfadt SP08 KSU

Biased  Add a bias to the signed number in order to make it unsigned  Subtract the bias to return Representation Value the original value 000 -4  Typically the bias is 2 k -1 for a k -bit representation 001 -3 010 -2 011 -1 100 0 101 1 110 2 111 3 CS35101 Ch3.Part1 10 Steinfadt SP08 KSU

Two's Complement  Most significant bit has a negative weight  To negate: invert bits and add one Representation Value  Implicit sign bit 000 0  One negative number that 001 +1 has no positive 010 +2  Handles overflow well 011 +3 100 -4 101 -3 110 -2 111 -1 CS35101 Ch3.Part1 11 Steinfadt SP08 KSU

Possible Representations Sign Mag. Two’s Comp. One’s Comp.  Issues: 1000 = -8 1111 = -7 1001= -7 1000 = -7  balance 1110 = -6 1010 = -6 1001 = -6  number of zeros 1101 = -5 1011 = -5 1010 = -5 1100 = -4 1100 = -4 1011 = -4  ease of operations 1011 = -3 1101 = -3 1100 = -3  Which one is best? 1010 = -2 1110 = -2 1101 = -2 1001 = -1 1111 = -1 1110 = -1 Why? 1000 = -0 1111 = -0 0000 = +0 0000 = 0 0000 = +0 0001 = +1 0001 = +1 0001 = +1 0010 = +2 0010 = +2 0010 = +2 0011 = +3 0011 = +3 0011 = +3 0100 = +4 0100 = +4 0100 = +4 0101 = +5 0101 = +5 0101 = +5 0110 = +6 0110 = +6 0110 = +6 0111 = +7 0111 = +7 0111 = +7 CS35101 Ch3.Part1 12 Steinfadt SP08 KSU

MIPS Representations  32-bit signed numbers (2’s complement): 0000 0000 0000 0000 0000 0000 0000 0000 two = 0 ten 0000 0000 0000 0000 0000 0000 0000 0001 two = + 1 ten maxint 0000 0000 0000 0000 0000 0000 0000 0010 two = + 2 ten ... 0111 1111 1111 1111 1111 1111 1111 1110 two = + 2,147,483,646 ten 0111 1111 1111 1111 1111 1111 1111 1111 two = + 2,147,483,647 ten 1000 0000 0000 0000 0000 0000 0000 0000 two = – 2,147,483,648 ten 1000 0000 0000 0000 0000 0000 0000 0001 two = – 2,147,483,647 ten 1000 0000 0000 0000 0000 0000 0000 0010 two = – 2,147,483,646 ten ... minint 1111 1111 1111 1111 1111 1111 1111 1101 two = – 3 ten 1111 1111 1111 1111 1111 1111 1111 1110 two = – 2 ten 1111 1111 1111 1111 1111 1111 1111 1111 two = – 1 ten  What if the bit string represented addresses?  need operations that also deal with only positive (unsigned) integers CS35101 Ch3.Part1 13 Steinfadt SP08 KSU

Two's Complement Operations  Negating a two's complement number – complement all the bits and then add a 1  remember: “negate” and “invert” are quite different!  Converting n-bit numbers into numbers with more than n bits:  MIPS 16-bit immediate gets converted to 32 bits for arithmetic  sign extend - copy the most significant bit (the sign bit) into the other bits 0010 -> 0000 0010 1010 -> 1111 1010  sign extension versus zero extend ( lb vs. lbu ) CS35101 Ch3.Part1 14 Steinfadt SP08 KSU

Zero/Sign Extension  Extension takes a number represented in m bits and converts it to n bits ( m < n ) while preserving its value  MIPS Load byte sign extends lb $s1, 100($s2)  MIPS Load half word sign extends lh $s1, 100($s2)  For unsigned numbers just add zeros to the left (zero extension)  lbu $s1, 100($s2)#C programs use for ASCII almost exclusive of lb  lhu $s1, 100($s2)  For two's complement signed numbers, replicate the sign bit (sign extension) CS35101 Ch3.Part1 15 Steinfadt SP08 KSU

Design the MIPS Arithmetic Logic Unit (ALU) zero ovf  Must support the Arithmetic/Logic operations of the ISA 1 1 A add, addi, addiu, addu 32 sub, subu ALU result 32 mult, multu, div, divu B sqrt 32 4 and, andi, nor, or, ori, xor, xori m (operation) beq, bne, slt, slti, sltiu, sltu  With special handling for  sign extend – addi, addiu, slti, sltiu  zero extend – andi, ori, xori  overflow detection – add, addi, sub CS35101 Ch3.Part1 16 Steinfadt SP08 KSU

MIPS Arithmetic and Logic Instructions 31 25 20 15 5 0 R-type: op Rs Rt Rd funct I-Type: op Rs Rt Immed 16 Type op funct Type op funct Type op funct ADDI 001000 xx ADD 000000 100000 000000 101000 ADDIU 001001 xx ADDU 000000 100001 000000 101001 SLTI 001010 xx SUB 000000 100010 SLT 000000 101010 SLTIU 001011 xx SUBU 000000 100011 SLTU 000000 101011 ANDI 001100 xx AND 000000 100100 000000 101100 ORI 001101 xx OR 000000 100101 XORI 001110 xx XOR 000000 100110 LUI 001111 xx NOR 000000 100111 CS35101 Ch3.Part1 17 Steinfadt SP08 KSU

Design Trick: Divide & Conquer  Break the problem into simpler problems, solve them and glue together the solution  Example: assume the immediates have been taken care of before the ALU  now down to 10 operations 0 add 1 addu  can encode in 4 bits 2 sub 3 subu 4 and 5 or 6 xor 7 nor a slt b sltu CS35101 Ch3.Part1 18 Steinfadt SP08 KSU

Addition & Subtraction  Just like in grade school (carry/borrow 1s) 0111 0111 0110 + 0110 - 0110 - 0101  Two's complement operations are easy  do subtraction by negating and then adding 0111 → 0111 - 0110 → + 1010  Overflow (result too large for finite computer word)  e.g., adding two n-bit numbers does not yield an n-bit number 0111 + 0001 CS35101 Ch3.Part1 19 Steinfadt SP08 KSU

Building a 1-bit Binary Adder A B carry_in carry_out S carry_in 0 0 0 0 0 0 0 1 0 1 A 1 bit 0 1 0 0 1 Full S B Adder 0 1 1 1 0 1 0 0 0 1 carry_out 1 0 1 1 0 1 1 0 1 0 1 1 1 1 1 S = A xor B xor carry_in carry_out = A&B | A&carry_in | B&carry_in (majority function)  How can we use it to build a 32-bit adder?  How can we modify it easily to build an adder/subtractor? CS35101 Ch3.Part1 21 Steinfadt SP08 KSU

Building 32-bit Adder c 0 =carry_in  Just connect the carry-out of A 0 1-bit S 0 FA the least significant bit FA to B 0 c 1 the carry-in of the next least significant bit and connect . . . A 1 1-bit S 1 FA B 1 c 2 A 2 1-bit  Ripple Carry Adder (RCA) S 2 FA B 2  advantage: simple logic, so small c 3 (low cost) . . .  disadvantage: slow and lots of c 31 glitching (so lots of energy A 31 1-bit consumption) S 31 FA B 31 c 32 =carry_out CS35101 Ch3.Part1 22 Steinfadt SP08 KSU