CPSC 121: Models of Computation Unit 8: Sequential Circuits Based on slides by Patrice Belleville and Steve Wolfman
Announcements Pre-class quiz #9 is due Wednesday November 8th at 9:00 pm. Textbook sections: o Epp, 4th edition: 5.1 to 5.4 o Epp, 3rd edition: 4.1 to 4.4 o Rosen, 6th edition: 4.1, 4.2 o Rosen, 7th edition: 5.1, 5.2 Assignment #4 is due Friday November 10th at 4:00 pm. Unit 8 - Sequential Circuits 2
Announcements (cont') Midterm #2: Wednesday November 15th 6:00-7:00 pm. Locations: o Section 101: HEBB 100 o Sections 102 and 103 : CIRS 1250 It will focus on o Slides: Units 5 to 8 o The pre-class readings for quizzes 5 to 8 o Labs 5 to 8. You will be given a copy of Dave’s Excellent Formula Sheet You can bring one 8.5 x 11in (21.59 x 27.94cm) two sided sheet of paper. No textbook, calculator or other electronic equipment is allowed. Please email the course coordinator by Nov 8 if you have a conflict. Unit 8 - Sequential Circuits 3
Announcements (cont') Pre-class quiz #10 is tentatively due Monday November 20th at 19:00. Textbook sections: o Epp, 4th edition: 6.1, 7.1 o Epp, 3rd edition: 5.1, 6.1 o Rosen, 6th edition: 2.1, 2.3 up to the top of page 136. o Rosen, 7th edition: 2.1, 2.3 down to the bottom of page 141. Unit 8 - Sequential Circuits 4
Pre-Class Learning Goals By the start of class, you should be able to Trace the operation of a DFA (deterministic finite- state automaton) represented as a diagram on an input, and indicate whether the DFA accepts or rejects the input. Deduce the language accepted by a simple DFA after working through multiple example inputs. Unit 8 - Sequential Circuits 5
Quiz 8 feedback: Over all: Issues : Push-button light question: We will revisit this problem soon. Unit 8 - Sequential Circuits 6
In-Class Learning Goals By the end of this unit, you should be able to: Translate a DFA into a sequential circuit that implements the DFA. Explain how and why each part of the resulting circuit works. Unit 8 - Sequential Circuits 7
? ? Related to CPSC 121 Big Questions How can we build a computer that is able to execute a user-defined program? Computers execute instructions one at a time. They need to remember values, unlike the circuits you designed in labs 1, 2, 3 and 4. NOW: We are learning to build a new kind of circuits with memory that will be the key new feature we need to build full-blown computers! Unit 8 - Sequential Circuits 8
Unit Outline Sequential Circuits :Latches, and flip-flops. DFA Example Implementing DFAs Other problems and exercises. Unit 8 - Sequential Circuits 9
Problem: Light Switch Problem: Design a circuit to control a light so that the light changes state any time its “push - button” switch is pressed. ? Unit 8 - Sequential Circuits 10
DFA for Push-Button Switch ? pressed light light off on pressed This Deterministic Finite Automaton (DFA) isn’t really about accepting/rejecting; its current state is the state of the light. A circuit that implements a DFA needs to remember the current state: It needs memory. Unit 8 - Sequential Circuits 11
Departures from Combinational Circuits MEMORY: We need to “remember” the light’s state. EVENTS: We need to act on a button push rather than in response to an input value. Unit 8 - Sequential Circuits 12
How Do We Remember? We want a circuit that: Sometimes… remembers its current state. Other times… loads a new state and remembers it. Sounds like a choice . What circuit element do we have for modelling choices? Unit 8 - Sequential Circuits 13
“Mux Memory” How do we use a mux to store a bit of memory? We choose to remember the old value on a control value of 0 and to load a new value on a 1. 0 ??? output 1 new data control What should Mux's input 0 be? Unit 8 - Sequential Circuits 14
“ Mux Memory” So, our circuit will look like the following: old output (Q’) 0 output (Q) 1 new data (D) control (G) This violates our basic combinational constraint: no cycles. Unit 8 - Sequential Circuits 15
Truth Table for “Mux Memory” Fill in the MM’s truth table: a. b. c. d. e. None G D Q' Q Q Q Q of 0 0 0 0 0 0 0 these 0 0 1 1 1 1 0 0 1 0 0 0 0 0 0 1 1 1 1 1 1 1 0 0 0 0 0 1 1 0 1 1 0 X 1 1 1 0 0 1 X 0 1 1 1 1 1 1 1 Unit 8 - Sequential Circuits 16
Truth Table for “Mux Memory” The truth table for the MM: G D Q' Q 0 0 0 0 0 0 1 1 0 1 0 0 0 1 1 1 1 0 0 0 1 0 1 0 1 1 0 1 1 1 1 1 Like a “normal” mux table, but what happens when Q' Q? Unit 8 - Sequential Circuits 17
Truth Table for “ Muxy Memory” The truth table for the MM: G D Q' Q 0 0 0 0 0 0 1 1 0 1 0 0 0 1 1 1 1 0 0 0 1 0 1 0 1 1 0 1 1 1 1 1 Q' “takes on” Q’s value at the “next step”. Unit 8 - Sequential Circuits 18
D Latches We call a "mux-memory" a D-latch ( recall from lab #5) When G is 0, the latch retains its current value. When G is 1, the latch loads a new value from D. old output (Q’) 0 output (Q) 1 new data (D) control (G) Unit 8 - Sequential Circuits 19
D Latch (as a component) When G is 0, the latch maintains its memory. When G is 1, the latch loads a new value from D. new data (D) D output (Q) Q control (G) G Unit 8 - Sequential Circuits 20
Back to the Light Switch Problem Problem: Design a circuit to control a light so that the light changes state any time its “push - button” switch is pressed. ? Let's use a D-Latch to implement our circuit. Unit 8 - Sequential Circuits 21
Push-Button Switch What signal does the button generate? high low Unit 8 - Sequential Circuits 22
Using a D Latch for Our Light Switch What goes in the cloud? What do we send into G? Combinational Circuit to calculate next state D Q output input ?? G Unit 8 - Sequential Circuits 23
Using the D Latch for Our Light Switch Problem : What do we send into G? D current light state Q ?? G output a. 1 if the button is down, 0 if it’s up. b. 1 if the button is up, 0 if it’s down. c. Neither of these. Unit 8 - Sequential Circuits 24
Using the D Latch for Our Light Switch Problem : What should be the next state of the light? D “pulse” when current light state Q button is pressed G output button pressed Unit 8 - Sequential Circuits 25
Using a D Latch for Our Light Switch Will this work? D “pulse” when current light state Q button is pressed G output button pressed Unit 8 - Sequential Circuits 26
Push-Button Switch What is wrong with our solution? A. We should have used XOR instead of NOT. B. As long as the button is down, D flows to Q, and it flows through the NOT gate and back to D and so on...which is bad! C. The delay introduced by the NOT gate is too long. D. As long as the button is down, Q flows to D, and it flows back to Q... and Q (the output) does not change! E. There is some other problem with the circuit. Unit 8 - Sequential Circuits 27
A Timing Problem This toll booth has a similar problem. What is wrong with this booth? P.S. Call this a “bar”, not a “gate”, or we'll tie ourselves in (k)nots. From MIT 6.004, Fall 2002 Unit 8 - Sequential Circuits 28
A Timing Solution Can 2 bars (set like in the picture) solve the problem ? From MIT 6.004, Fall 2002 Unit 8 - Sequential Circuits 29
Our Timing Problem D current light state “pulse” when Q button is G pressed output As long as the button is down, D flows to Q flows through the NOT gate and back to D and so on... which is bad! We need a second "bar". Unit 8 - Sequential Circuits 30
A Timing Solution (Almost) Can this work? D D Q Q G G output Problem: We should never raise both “bars” at the same time. Unit 8 - Sequential Circuits 31
A Timing Solution D D Q Q G G button output press signal The two latches are never enabled at the same time (except for the moment needed for the NOT gate on the left to compute, which is so short that no “cars” get through). Let's trace it : Unit 8 - Sequential Circuits 32
Button is LO (unpressed) 1 1 D D 0 Q Q 1 G G output 0 LO We’re assuming the circuit has been set up and is “running normally”. Right now, the light is off (i.e., the output of the right latch is 0). Unit 8 - Sequential Circuits 33
Button goes HI (is pressed) 1 1 D D 0 Q Q 1 G G output HI 1 This stuff is processing a new signal. Unit 8 - Sequential Circuits 34
Propagating signal.. left NOT, right latch 1 1 D D 1 Q Q 0 G G output HI 1 This stuff is processing a new signal. Unit 8 - Sequential Circuits 35
Propagating signal.. right NOT (steady state) 0 1 D D 1 Q Q 0 G G output HI 1 Why doesn’t the left latch update? a. Its D input is 0. b. Its G input is 0. c. Its Q output is 1. d. It should update! Unit 8 - Sequential Circuits 36
Button goes LO (released) 0 1 D D 1 Q Q 0 G G output LO 0 This stuff is processing a new signal. Unit 8 - Sequential Circuits 37
Recommend
More recommend
