CERN CMS Project Host / SD Card Configuration Data Access Dave Ojika Alex Madorsky Dr. Darin Acosta Dr. Ivan Furic
Project Description • Design of an FPGA SD card system with support for data communication with host processor over PCIe link • SD card stores configuration data needed to program Core FPGA • Configuration data can be written to, or read from host via high-bandwidth link enabled by PCIe
CURRENT SYSTEM Host PC PCIe To Core FPGA PCI Chip-to-Chip Controller AXI Bus • Decoupled functional units into separate entities Configuration Flash Memory • Simulated Configuration Controller Controller Controller block • Will replace Flash Memory Controller block • PCIe Controller not FLASH currently part of design
SD CARD SYSTEM ARCHITECTURE Host Bus Legend Control Data General House Keeping M A S T E R Host Interface Unit S L A V E Wishbone Bus M A S T E R S L A V E SD Card Controller Bus Arbiter SD Card Interface • Integrated SD Card Controller IP Unit • CRC, 4-bit data transfer, DMA • Designed and simulated Wishbone bus and controller • Simulating and testing Host Interface and SD Card Interface SD Card • Next: Test hardware design on Virtex 7 with micro SD Card
DESIGN SYNTHESIS Host External Host Interface Logic Wishbone SD Card Bus Interface Arbiter Logic SD Card Controller Verification in progress…
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