10-bit Linearity CCRO with Rolling Regulation Intro CCRO Rolling-Regulation Example Conclusions 1/19 A 10-bit Linearity Current-Controlled Ring Oscillator with Rolling Regulation for Smart Sensing M.Dei 1 , J.Sacristán 1 , E.Marigó 2 , M.Soundara 2 ,L.Terés 1,3 and F.Serra-Graells 1,3 paco.serra@imb-cnm.csic.es 1 Instituto de Microelectrónica de Barcelona, IMB-CNM(CSIC), Spain 2 Silterra Malaysia Sdn. Bhd., Malaysia 3 Universitat Autònoma de Barcelona, Spain May 2017 M. Dei et al. IEEE ISCAS 2017
10-bit Linearity CCRO with Rolling Regulation Intro CCRO Rolling-Regulation Example Conclusions 2/19 1 Introduction 2 CCRO Non-Linearity Issues 3 Rolling Regulation Proposal 5 Design Example in 0.18µm CMOS Technology 6 Conclusions M. Dei et al. IEEE ISCAS 2017
10-bit Linearity CCRO with Rolling Regulation Intro CCRO Rolling-Regulation Example Conclusions 3/19 1 Introduction 2 CCRO Non-Linearity Issues 3 Rolling Regulation Proposal 5 Design Example in 0.18µm CMOS Technology 6 Conclusions M. Dei et al. IEEE ISCAS 2017
10-bit Linearity CCRO with Rolling Regulation Intro CCRO Rolling-Regulation Example Conclusions 4/19 Introduction Time-domain processing for low-voltage digital-like ADCs Current-controlled ring oscillator ( CCRO ) to interface with current-mode sensors (e.g. optical, chemical) Coarse / fi ne architectures for low-power operation M. Dei et al. IEEE ISCAS 2017
10-bit Linearity CCRO with Rolling Regulation Intro CCRO Rolling-Regulation Example Conclusions 5/19 Introduction Time-domain processing for low-voltage digital-like ADCs Current-controlled ring oscillator ( CCRO ) to interface with current-mode sensors (e.g. optical, chemical) Coarse / fi ne architectures for low-power operation Classic current-starving circuit implementation Current steering to improve uniformity of fi ne quantization Signal dependency of CCRO rail voltage (V OSC ) causes I-to-F non-linearity M. Dei et al. IEEE ISCAS 2017
10-bit Linearity CCRO with Rolling Regulation Intro CCRO Rolling-Regulation Example Conclusions 6/19 1 Introduction 2 CCRO Non-Linearity Issues 3 Rolling Regulation Proposal 5 Design Example in 0.18µm CMOS Technology 6 Conclusions M. Dei et al. IEEE ISCAS 2017
10-bit Linearity CCRO with Rolling Regulation Intro CCRO Rolling-Regulation Example Conclusions 7/19 CCRO Non-Linearity Issues Di ff erential latch (M1,2) with symmetrical load capacitance (C stage ) M. Dei et al. IEEE ISCAS 2017
10-bit Linearity CCRO with Rolling Regulation Intro CCRO Rolling-Regulation Example Conclusions 8/19 CCRO Non-Linearity Issues Di ff erential latch (M1,2) with symmetrical load capacitance (C stage ) PMOS transistors de fi ne rail voltage : EKV model in strong inversion forward saturation M. Dei et al. IEEE ISCAS 2017
10-bit Linearity CCRO with Rolling Regulation Intro CCRO Rolling-Regulation Example Conclusions 9/19 CCRO Non-Linearity Issues 10 9 Di ff erential latch (M1,2) with symmetrical load 8 capacitance (C stage ) 7 6 5 4 3 2 PMOS transistors de fi ne rail voltage : 1 0 0 1 2 3 4 5 6 7 8 9 10 Strong non-linearities for high-current full scale or low-voltage operation M. Dei et al. IEEE ISCAS 2017
10-bit Linearity CCRO with Rolling Regulation Intro CCRO Rolling-Regulation Example Conclusions 10/19 1 Introduction 2 CCRO Non-Linearity Issues 3 Rolling Regulation Proposal 5 Design Example in 0.18µm CMOS Technology 6 Conclusions M. Dei et al. IEEE ISCAS 2017
10-bit Linearity CCRO with Rolling Regulation Intro CCRO Rolling-Regulation Example Conclusions 11/19 CCRO with Rolling Regulation Series transistor ( M3 ) to regulate rail voltage independently from signal current Second generation current conveyor ( CCII+ ) as common control Rail voltage regulation + signal current steering Control of M3 transistors is ROLLING along the ring like I sens M. Dei et al. IEEE ISCAS 2017
10-bit Linearity CCRO with Rolling Regulation Intro CCRO Rolling-Regulation Example Conclusions 12/19 CMOS Circuit Implementation 3-stage CCII+ circuit: + X-branch to supply low input impedance and to sense error current + Y-branch to bias M4 for any PVT condition so V osc =V ref when I err =0 + Z-branch to apply negative-feedback control using error current M. Dei et al. IEEE ISCAS 2017
10-bit Linearity CCRO with Rolling Regulation Intro CCRO Rolling-Regulation Example Conclusions 13/19 CMOS Circuit Implementation 3-stage CCII+ circuit: + X-branch to supply low input impedance and to sense error current dominant pole + Y-branch to bias M4 for any PVT condition so V osc =V ref when I err =0 + Z-branch to apply negative-feedback control using error current Better stability compared to OpAmp-based solutions: Rail-voltage low sensitivity respect to signal current M. Dei et al. IEEE ISCAS 2017
10-bit Linearity CCRO with Rolling Regulation Intro CCRO Rolling-Regulation Example Conclusions 14/19 1 Introduction 2 CCRO Non-Linearity Issues 3 Rolling Regulation Proposal 5 Design Example in 0.18µm CMOS Technology 6 Conclusions M. Dei et al. IEEE ISCAS 2017
10-bit Linearity CCRO with Rolling Regulation Intro CCRO Rolling-Regulation Example Conclusions 15/19 Application Example MEMS temperature monitoring CMOS PTAT reference operating in weak inversion as temperature sensor 10-bit 100-kS/s ADC speci fi cations Design parameters: + 5-bit / 5-bit coarse/ fi ne quantization splitting + V osc = 1.4V C stage = 20fF I ptat = 5µA at 300K f osc < 4MHz M. Dei et al. IEEE ISCAS 2017
10-bit Linearity CCRO with Rolling Regulation Intro CCRO Rolling-Regulation Example Conclusions 16/19 Application Example 3.6 MEMS temperature monitoring 3.4 Frequency [MHz] 3.2 CMOS PTAT reference operating in weak inversion 3 as temperature sensor 10-bit linearity for the 2.8 125-C temperature span 10-bit 100-kS/s 2.6 ADC speci fi cations 1 Design parameters: 0.75 + 5-bit / 5-bit coarse/ fi ne 0.5 quantization splitting 0.25 + V osc = 1.4V DNL [LSB] 0 C stage = 20fF I ptat = 5µA at 300K − 0.25 f osc < 4MHz none digital calibration − 0.5 nor post-compensation technique required − 0.75 70-µW (at 1.8-V) power consumption − 1 − 40 − 30 − 20 − 10 0 10 20 30 40 50 60 70 80 90 Temperature [C] M. Dei et al. IEEE ISCAS 2017
10-bit Linearity CCRO with Rolling Regulation Intro CCRO Rolling-Regulation Example Conclusions 17/19 Application Example MEMS temperature monitoring 250µm x 200µm (0.05mm 2 ) CMOS PTAT reference operating in weak inversion as temperature sensor 10-bit 100-kS/s ADC speci fi cations Design parameters: + 5-bit / 5-bit coarse/ fi ne quantization splitting + V osc = 1.4V C stage = 20fF I ptat = 5µA at 300K f osc < 4MHz 70-µW (at 1.8-V) ...currently being integrated in power consumption 0.18-µm 1P6M CMOS technology. M. Dei et al. IEEE ISCAS 2017
10-bit Linearity CCRO with Rolling Regulation Intro CCRO Rolling-Regulation Example Conclusions 18/19 1 Introduction 2 CCRO Non-Linearity Issues 3 Rolling Regulation Proposal 5 Design Example in 0.18µm CMOS Technology 6 Conclusions M. Dei et al. IEEE ISCAS 2017
10-bit Linearity CCRO with Rolling Regulation Intro CCRO Rolling-Regulation Example Conclusions 19/19 Conclusions A highly linear I-to-F current-steering CCRO has been presented for ADC Based on rail-voltage distributed regulation concept Usage of current conveyors to improve loop stability 10-bit 100-kS/s ADC example in 0.18-µm 1P6M CMOS technology Performance achieved without digital calibration nor post-compensation Thanks for your attention! Partially funded by Silterra Malaysia Sdn. Bhd. and supported by CSIC-201650E019 and 2014-SGR-1452 M. Dei et al. IEEE ISCAS 2017
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