Upper and Lower Loop Bound Estimation by Symbolic Execution and Loop Acceleration Pavel ˇ Cadek 1 1 TU Wien, Austria Formal Methods in Computer-Aided Design 30 Oct - 2 Nov, 2018
Loop Bound Analysis Upper loop bound: max { n , 0 } Lower loop bound: max { n , 0 } i:=0 i<n Usage: worst case execution time i:=i+1 memory consumption i>=n complexity analysis . . . Pavel ˇ Cadek ( TU Wien, Austria ) FMCAD 2018 2 / 5
Symbolic Execution - Path Explosion Path conditions: i:=0 ϕ 1 ≡ 0 ≥ n i<n i>=n ϕ 2 ≡ 0 < n ∧ 1 ≥ n i:=i+1 ϕ 3 ≡ . . . i>=n i<n . . . . . . Pavel ˇ Cadek ( TU Wien, Austria ) FMCAD 2018 3 / 5
Loop Acceleration i:=i+ κ i<n � i:=i+1 i<=n Pavel ˇ Cadek ( TU Wien, Austria ) FMCAD 2018 4 / 5
Combination i:=0 κ >0 Path conditions: ϕ 1 ≡ κ = 0 ∧ 0 ≥ n κ ==0 i:=i+ κ ϕ 2 ≡ κ > 0 ∧ κ ≤ n ∧ κ ≥ n = ⇒ κ = max { n , 0 } i<=n i>=n Pavel ˇ Cadek ( TU Wien, Austria ) FMCAD 2018 5 / 5
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