Undervolting in WSNs – A Feasibility Analysis IEEE World Forum Internet of Things 2014 Ulf Kulau, Felix Büsching and Lars Wolf, March 8, 2014 Technische Universität Braunschweig, IBR
Introduction Prototyping and Preliminary Studies Implementation Evaluation Conclusion Undervolting in WSNs – Motivation Energy Efficiency in WSNs / IoT plays a significant role Usability, Feasibility, Acceptance... Limping evolution of batteries (capacity) Various existing approaches on several layers March 8, 2014 Ulf Kulau Undervolting in WSNs – A Feasibility Analysis Page 2
Introduction Prototyping and Preliminary Studies Implementation Evaluation Conclusion Undervolting in WSNs – Motivation Energy Efficiency in WSNs / IoT plays a significant role Usability, Feasibility, Acceptance... Limping evolution of batteries (capacity) Various existing approaches on several layers Application Layer Data Management, Compression, ... Network Layer Routing, RPL, ... Data Link Layer TDMA, LPL (X-MAC), ... Physical Layer DPM, PVS, DVS, ... March 8, 2014 Ulf Kulau Undervolting in WSNs – A Feasibility Analysis Page 2
Introduction Prototyping and Preliminary Studies Implementation Evaluation Conclusion Undervolting in WSNs – Motivation Existing approaches are inflexible: Real environmental conditions (changes) are less considered They act conservatively (reliability) Usage comes often with some limitations (e.g. waiting periods) March 8, 2014 Ulf Kulau Undervolting in WSNs – A Feasibility Analysis Page 3
Introduction Prototyping and Preliminary Studies Implementation Evaluation Conclusion Undervolting Basics - DVS ICs are mostly based on CMOS technology Static power dissipation is negligible Overall power consumption is dominated by p dyn = C L · f cpu · V 2 But the switching delay of CMOS gates depends on V → V ( f cpu ) (Un-)Safe Operating Area March 8, 2014 Ulf Kulau Undervolting in WSNs – A Feasibility Analysis Page 4
Introduction Prototyping and Preliminary Studies Implementation Evaluation Conclusion Undervolting Basics - DVS ICs are mostly based on CMOS technology Static power dissipation is negligible Overall power consumption is dominated by p dyn = C L · f cpu · V 2 But the switching delay of CMOS gates depends on V → V ( f cpu ) (Un-)Safe Operating Area DVS: Adapting f cpu to current Workload and scale V ( f cpu ) f cpu = 8MHz f cpu = 8MHz f cpu = 4MHz f cpu = 6MHz 100% 100% voltage voltage Task 1 Task 2 Task 2 Task 1 0% 0% T T T T DPM DVS March 8, 2014 Ulf Kulau Undervolting in WSNs – A Feasibility Analysis Page 4
Introduction Prototyping and Preliminary Studies Implementation Evaluation Conclusion Undervolting Basics - DVS ICs are mostly based on CMOS technology Static power dissipation is negligible Overall power consumption is dominated by p dyn = C L · f cpu · V 2 But the switching delay of CMOS gates depends on V → V ( f cpu ) (Un-)Safe Operating Area Undervolting: Violate specifications V ( f cpu ) V ( f cpu ) − ∆ V → f cpu = 8MHz f cpu = 8MHz f cpu = 4MHz f cpu = 6MHz 100% 100% voltage voltage Task 1 Task 2 Task 1 Task 2 Task 2 Task 2 Task 1 0% 0% T T T T Undervolting March 8, 2014 Ulf Kulau Undervolting in WSNs – A Feasibility Analysis Page 4
Introduction Prototyping and Preliminary Studies Implementation Evaluation Conclusion Undervolting – Basics Temperature Dependency Specification of V ( f cpu ) is given in Datasheets Specification does not include the temperature V ( f cpu , T ) Threshold Voltage V th of CMOS is temperature dependent V th ( T ) = V th 0 + α · ( T − T 0 ) March 8, 2014 Ulf Kulau Undervolting in WSNs – A Feasibility Analysis Page 5
Introduction Prototyping and Preliminary Studies Implementation Evaluation Conclusion Undervolting – Basics Temperature Dependency Specification of V ( f cpu ) is given in Datasheets Specification does not include the temperature V ( f cpu , T ) Threshold Voltage V th of CMOS is temperature dependent V th ( T ) = V th 0 + α · ( T − T 0 ) MCUs cover a widespread temperature range with a fixed voltage level V ( f cpu ) → MCUs must be able to run below V ( f cpu ) (under normal conditions) March 8, 2014 Ulf Kulau Undervolting in WSNs – A Feasibility Analysis Page 5
Introduction Prototyping and Preliminary Studies Implementation Evaluation Conclusion Challenges and Issues Undervolting will lead to a higher unreliability: Operating devices outside their specification Calculation errors, losses, resets, failures may affect the application March 8, 2014 Ulf Kulau Undervolting in WSNs – A Feasibility Analysis Page 6
Introduction Prototyping and Preliminary Studies Implementation Evaluation Conclusion Challenges and Issues Undervolting will lead to a higher unreliability: Operating devices outside their specification Calculation errors, losses, resets, failures may affect the application Our Perspective: WSNs are designed to be fault tolerant per se (protocols, algorithms, applications, ...) WSNs need increased energy efficiency and offer fault tolerance (ideal) March 8, 2014 Ulf Kulau Undervolting in WSNs – A Feasibility Analysis Page 6
Introduction Prototyping and Preliminary Studies Implementation Evaluation Conclusion Theory and Practice Preparations: Ordering of ATmega1284p MCUs from different distributors Implementation of a prototype to analyze the effect of Undervolting core Voltage JTAG JTAG Header Header PCB Antenna PCB Antenna SPI Transceiver Transceiver 802.15.4 802.15.4 I/O AT86RF231 AT86RF231 MCU MCU ext. Voltage ATmega1284p ATmega1284p Supply UART0 UART / USB UART / USB FTDI232 FTDI232 I2C Voltage I2C Voltage Co-Processor Co-Processor Scaling Scaling V core ATtiny84 ATtiny84 I2C Bus Module Module V ext March 8, 2014 Ulf Kulau Undervolting in WSNs – A Feasibility Analysis Page 7
Introduction Prototyping and Preliminary Studies Implementation Evaluation Conclusion Detecting failures caused by Undervolting Continuous (periodic) observation (counter-check) of... Busses (I2C, SPI) GPIOs Clock rate ALU failures (calculation errors) 1A. Rohani and H.-R. Zarandi, ”An analysis of fault effects and propagations in avr microcontroller atmega103(l),” March 8, 2014 Ulf Kulau Undervolting in WSNs – A Feasibility Analysis Page 8
Introduction Prototyping and Preliminary Studies Implementation Evaluation Conclusion Detecting failures caused by Undervolting Continuous (periodic) observation (counter-check) of... Busses (I2C, SPI) GPIOs Clock rate ALU failures (calculation errors) How to detect ALU failures by software? A complete test is not adequate ( ( 2 n ) m ) Sufficient error detection through checksum calculation 1 checksum = det ( A · B ) with A , B ∈ R n × n 1A. Rohani and H.-R. Zarandi, ”An analysis of fault effects and propagations in avr microcontroller atmega103(l),” March 8, 2014 Ulf Kulau Undervolting in WSNs – A Feasibility Analysis Page 8
Introduction Prototyping and Preliminary Studies Implementation Evaluation Conclusion Testbench Implementation Undervolted MCU 2nd reliable MCU (Secure Instance) Periodic Test Cycle Voltage Scaling Module Voltage Scaling Module MCU MCU Interface Test GPIO Test MCU MCU AtTiny84 AtTiny84 Test OK / FAIL Test OK / FAIL AtMega1284p AtMega1284p ALU Test Test Scores (Checksum) PWR Dissipation PWR Dissipation Clock Rate Feedback Clock Rate Clock Rate I2C Bridge I2C Bridge I2C-Bus Periodic Test Cycle (1Hz): Execute tests on undervolted MCU and use reliable MCU for validation Measure time between test cycles and generate binary feedback for clock rate adjustment March 8, 2014 Ulf Kulau Undervolting in WSNs – A Feasibility Analysis Page 9
1770 1520 1720 1670 1620 1570 Introduction Prototyping and Preliminary Studies Implementation Evaluation Conclusion Results – Clock Rate Recalibration 0 10 20 30 40 50 4.1 4.1 4 4 3.9 3.9 f cpu [MHz] 3.8 3.8 3.7 3.7 V = 1,52V ≙ ∆V = 0,28V V = 1,57V ≙ ∆V = 0,23V 3.6 3.6 V = 1,62V ≙ ∆V = 0,18V V = 1,67V ≙ ∆V = 0,13V V = 1,72V ≙ ∆V = 0,08V 3.5 3.5 V = 1,77V ≙ ∆V = 0,03V 3.4 3.4 0 10 20 30 40 50 time [s] Linear recalibration of the clock rate (binary feedback) Constant clock rate despite using undervolting March 8, 2014 Ulf Kulau Undervolting in WSNs – A Feasibility Analysis Page 10
Introduction Prototyping and Preliminary Studies Implementation Evaluation Conclusion Results – Functionality analysis 1/2 Evaluation of three MCUs from different distributors: 0 5 10 15 20 25 0 5 10 15 20 25 0 5 10 15 20 25 30 100 100 100 100 100 100 probability of failures [%] probability of failures [%] probability of failures [%] 80 80 80 80 80 80 f cpu = 4MHz f cpu = 4MHz f cpu = 4MHz f cpu = 5MHz f cpu = 5MHz f cpu = 5MHz 60 60 60 60 60 60 f cpu = 6MHz f cpu = 6MHz f cpu = 6MHz f cpu = 7MHz f cpu = 7MHz f cpu = 7MHz 40 f cpu = 8MHz 40 40 f cpu = 8MHz 40 40 f cpu = 8MHz 40 20 20 20 20 20 20 0 0 0 0 0 0 0 5 10 15 20 25 0 5 10 15 20 25 0 5 10 15 20 25 deviation from the nominal voltage V(f cpu ) [%] deviation from the nominal voltage V(f cpu ) [%] deviation from the nominal voltage V(f cpu ) [%] March 8, 2014 Ulf Kulau Undervolting in WSNs – A Feasibility Analysis Page 11
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