Tutorial 4 : Test Pattern generations using TetraMAX Authors: Bibhas - PDF document

Tutorial 4 : Test Pattern generations using TetraMAX Authors: Bibhas Ghoshal & Subhadip Kundu Objectives: 1. To generate test patterns for a synthesized netlist 1. Invoke TetraMAX To run TetraMAX, just type tmax in the command prompt. [subhadip@localhost ~]$ tmax & ------------------------------- For Synthesized Netlist ------------------------------ 2.Read Library files: You need to read two library files to run TetraMAX properly. In GUI, Select Netlist->Read Netlist I Then Browese to your library folder and select udps.v. Run. Again, Netlist->Read Netlist->Browse (in the same folder)-> unit_delay_models.v. Run.

3. Read the synthesized file. 3 Netlist->Read Netlist->Browse (to your syn folder)->s27_syn.v. Run. N

4. Run Build Model: Here, you need to build your model. To do that, in GUI, go to Netlist->Run Build Model->run 5. Run DRC. Here, we check whether your design have any probem or not. DRC stands for design rule check. In GUI, Rules-> Run DRC

6. Setting fault options. In GUI, Faults-> Set fualt options. Tick collapsed list. 7. Run ATPG 7 In GUI, Run->Run ATPG-> a box will appear. In the bottom of the box, from Fault Source, Select add all faults. In the right hand side of the box, select full_seq.

8. Report fault coverage. Fault coverage will be given in the window. Note it down. close TMAX and again open for the next session.

-------------------------------- For DFT inserted synthesized Netlist -------------------------------- 9. Read Library files: You need to read two library files to run TetraMAX properly. In GUI, Select Netlist->Read Netlist I Then Browse to your library folder and select udps.v. Run. T Again, Netlist->Read Netlist->Browse (in the same folder)-> unit_delay_models.v. Run. A 10. Read the DFT inserted synthesised file. 1 Netlist->Read Netlist->Browse (to your dft folder)->s27_dft.v. Run. N 11. Run Build Model: Here, you need to build your model. To do that, in GUI, go to Netlist->Run Build Model->run H **** IMP **** If you found the following error message, Error: Module ( dff_1_test_1 ) referenced undefined module ( SDFFQX2_TAX1 ). Open your dft synthesized file. Here s27_dft.v. Change manually SDFFQX2_TAX1 to SDFFQX2_TAX0 for all dffs. Save your file. Now Read again and do Run Build Model. This error is due to library mismatch issues. 12. Insert SCAN Clock: Type add_clocks 0 { CK } in the tetramax command prompt.

13. Write DRC File. 1 Go to Rules-> Write DRC File-> Select your Protocol file name Open this file using gedit and do the following modifications O 1. Scroll Down through the paragraph: ScanStructures { // Uncomment and modify the following to suit your design ScanChain "chain_name" { ScanIn "test_si"; ScanOut "test_so"; } } 2. Again, Scroll down to the line and do the following modifications // Uncomment and modify the following to suit your design load_unload { V { "CK" = 0 ; "test_se" = 1 ; } // force clocks off and scan enable pins active Shift { V { _si=#; _so=#; "CK" = P; }} // pulse shift clocks } Save the file. 14. Switch to tetraMAX

15. Run DRC. Here, we check whether your design have any problem or not. DRC stands for design rule check. In GUI, Rules-> Run DRC-> Select the file with the above modification-> Run 16. Setting fault options. In GUI, Faults-> Set fualt options. Tick collapsed list. I 17. Run ATPG 1 In GUI, Run->Run ATPG-> a dialogue box will appear. In the bottom of the box, from Fault Source, Select add all faults. Then, Run. T 18. Report fault coverage. Fault coverage will be given in the window. Note it down