towards a synchronous react ive uml prof ile
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Towards a Synchronous React ive UML Prof ile? Robert de Simone Charles Andr SVERTS San Francisco 2003 Charles ANDRE Synchronous hypot heses S/ R st ands f or Synchronous React ive Logical division of t ime int o inst ant


  1. Towards a “Synchronous React ive” UML Prof ile? Robert de Simone Charles André SVERTS – San Francisco 2003 – Charles ANDRE

  2. Synchronous hypot heses S/ R st ands f or Synchronous React ive • Logical division of t ime int o inst ant s • At each inst ant : execut e a synchronous cycle (a react ion) – Acquisit ion – Comput e (a global run-t o-complet ion) – Act uat e • Signals are t he unique support f or communicat ion SVERTS – San Francisco 2003 – Charles ANDRE

  3. Where S/ R should be used • Applicat ions: – Embedded cont r oller , HMI , HW/ SW, … • Formalisms: – St r ict ly synchr onous • SCADE, Est erel St udio, Block Diagrams – Almost synchronous • St at echart s, VHDL/ Verilog, Simulink, Scicos Circuits CAD DSP, autom . Control simulators SVERTS – San Francisco 2003 – Charles ANDRE

  4. Cont rol-f low / Dat a-f low Esterel/ SyncCharts: State state- oriented (hierarchical, register, counter, …) Clk Control Flow Activations S/ R capsules Conditions (events) OUTPUTS Data Flow INPUTS (pipeline, …) Memory, Lustre/ Scade: Processing units activity- oriented ? SVERTS – San Francisco 2003 – Charles ANDRE

  5. S/ R semant ic domain SRModel 0..1 +input SRInput SRSignal 0..1 * presenceStatus 1 +react() +sample() value +getValue() +setPresence() SROutput 0..1 +output * +setValue() 0..1 +testPresence() +actuate() +fixStatus() 1 +noMoreEmit() 0..1 0..1 +top * SRUnit +local 1 +react() 0..* 0..* +outp 0..* +inp +parent 0..1 0..* Clock 0..* +child Not a metamodel – Only to represent main concepts SVERTS – San Francisco 2003 – Charles ANDRE

  6. Dynamic semant ics Reaction = Behavior at one instant * {ordered} 1 read +inEvent SRModel SRReaction SRInputEvent SRInput 1 {ordered} * {ctr_sync1} +sig 1 +inputHistory +reactionSequence write SROutputEvent 1 {ordered} 1 * SROutput +sig +outEvent +outputHistory * 1 +instant 1 Clock SRInstant {ordered} * * 1 SREvent +instantSequence {ctr_sync2} +instant 1 +instant * 1 SRClockedSignal 1 SRSignal * {ordered} * presenceStatus +sigOccs +sig +signalHistory value Event = Signal Set of occurrence signal occurrences SVERTS – San Francisco 2003 – Charles ANDRE

  7. Example of an Ar bit er • Users: Rq and Rl • Arbit er: G, D • Exclusive access • St at ic pr ior it y User 1 User N • D valued wit h t he nb UserCtrl UserCtrl of candidat es f or Arbiter t he resource wit h higher pr ior it y Critical resource • Linear descr ipt ion vs. t he nb of users SVERTS – San Francisco 2003 – Charles ANDRE

  8. St at e-based synchronous modeling ArbUnit Structure auto input Fi, Rq, Rl output Fo, G, D diagram Fi/Fo Rq # Rl Fi Fo Fi Fo Fi Fo rscNeeded F1 F2 / G / D Rq G Rq G Rq G A1:ArbUnit A2:ArbUnit A3:ArbUnit # not Fi using blkd Rl D Rl D Rl D Fi Rl D Rl D Rl D Rq G Rq G Rq G U1:UserCtrl U2:UserCtrl U3:UserCtrl other inputs other outputs other inputs other outputs other inputs other outputs syncCharts SVERTS – San Francisco 2003 – Charles ANDRE

  9. Limit at ions of t he UML St at e Machines • Obj ect -based variant of st at echart s • Semant ics described in t erms of operat ions of a hypot het ical machine • Event queue + dispat cher • Event s are dispat ched and processed one at a t ime • Run-t o-complet ion assumpt ion • Poor support f or concurrency SVERTS – San Francisco 2003 – Charles ANDRE

  10. What is missing • Dealing wit h one event at a t ime is not accept able f or S/ R models: many is t he r ule • Combinat ion of event s (signals) • Run-t o-complet ion: t o much rest rict ive. S/ R have high degree of concurrency • A not ion out of t he scope of classical asynchronous models: react ion t o t he absence • Needs: a clear not ion of inst ant SVERTS – San Francisco 2003 – Charles ANDRE

  11. Act ivit y-orient ed approach I nitial node U Initially: state = auto Fi.test() [state==auto] [state==rscNeeded] [present] [absent] A U G.setP() D.setP() A Activity D.setA() G.setA() Rq.test() diagram for a [absent] [present] reaction of the Fo.setA() ArbUnit Rl.test() U Fi.test() [present] [absent] [present] [absent] state=auto state=rscNeeded Fo.setP() Fo.setA() Final node Activities f rom initial to f inal SVERTS – San Francisco 2003 – Charles ANDRE within one instant

  12. Emer gent behavior U1:UserCtrl A1:ArbUnit U2:UserCtrl A2:ArbUnit U3:UserCtrl A3:ArbUnit autonomous auto usingRsc using autonomous using Finite and acyclic at autonomous.react() autonomous.react() Rq.setP() Rq.setP() each instant Rq.test() Rq.test() Fi.test() Fo.setA() Causality G.setP() Fi.test() relation G.test() D.setA() A reaction Fo.setA() D.setP() A signal may usingRsc.react() D.test() G.setA() Fi.test() be t est ed Rl.setA() Rl.setA() D.setP() only af t er Rl.test() Fo.setA() Rl.test() being set G.setA() G.test() Rl.setA() Rl.test() Stable conf iguration usingRsc using usingRsc using usingRsc using SVERTS – San Francisco 2003 – Charles ANDRE

  13. SR SPT High- level design & Temporal analysis Purpose programming Perf ormance analysis Real- time simulation I mplementation Relevance of timing independent f igures? Logical discrete time Ref erence clock Time (represent s physical t ime) Causality appears as abstract causality within time precedence instant Signal buf f ering, queues Strict instant: possibility to lose f leeting events SVERTS – San Francisco 2003 – Charles ANDRE

  14. Scheduling in S/ R • Temporal and/ or spat ial mapping (SynDEx) • Essent ial needs: respect causalit y • I nt roduce chronomet ric t ime on archit ect ural plat f orm resources • Of t en: a unif orm scheduling f or t he whole applicat ion (i.e., a scheduling valid f or all react ions). SVERTS – San Francisco 2003 – Charles ANDRE

  15. Conclusion • “Cont rol syst em engineering” has specif ic needs, not all addressed by t he UML • The S/ R approach answers some of t hem • UML + … • SPT OK f or real-t ime cooperat ion of obj ect s • S/ R well-suit ed f or Cont rol f low/ Dat a f low t ight int eract ions. But it demands relaxing some UML rules (especially f or UML SM semant ics) SVERTS – San Francisco 2003 – Charles ANDRE

  16. S/ R Mixed Archit ect ure Activation Event SVERTS – San Francisco 2003 – Charles ANDRE

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