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The HeartBeat model A platform abstraction enabling fast prototyping of real-time applications on NoC-based MPSoC on FPGA Francesco Robino, Johnny Oberg KTH Royal Institute of Technology ReCoSoC 2013 F. Robino (KTH) The HeartBeat model


  1. The HeartBeat model A platform abstraction enabling fast prototyping of real-time applications on NoC-based MPSoC on FPGA Francesco Robino, Johnny ¨ Oberg KTH Royal Institute of Technology ReCoSoC 2013 F. Robino (KTH) The HeartBeat model 11-07-2013 1 / 16

  2. Overview of the talk Motivation What is the problem? Benefits solving the problem Our solution Modeling techniques Our idea From idea to implementation Experimental evidences and examples Conclusion F. Robino (KTH) The HeartBeat model 11-07-2013 2 / 16

  3. Motivation: Embedded systems modeling Embedded systems are getting very complex We want to abstract , reduce details in the system model We want S ystem D esign A utomation to automatically add details it implements the embedded application on multi-processor platforms the automated synthesis of the whole system must be fast ! F. Robino (KTH) The HeartBeat model 11-07-2013 3 / 16

  4. Motivation: Embedded system architecture Embedded architectures are getting very sea-of-cores / processors complex details are increasing! NoC-based MPSoC Pe0 Pe1 Pe2 Pe3 Pe4 Pe5 Pe6 Pe7 Pe8 Pe9 Pe10 Pe11 F. Robino (KTH) The HeartBeat model 11-07-2013 4 / 16

  5. The problem Huge abstraction gap Huge design space Platform allocation Processes binding Processes schedule Platform: complex to program complex to generate P e P e P e P e P e P e Filling the gap through design automation: benefits Reduces time to market, reduces errors, reduces complexity... F. Robino (KTH) The HeartBeat model 11-07-2013 5 / 16

  6. Modeling techniques The theory of models of computation (MoCs) A MoC defines communication and execution rules between nodes executing the operations . The MoC rules can be described through formal notation (math) Embedded application modeled as a set of communicating processes F. Robino (KTH) The HeartBeat model 11-07-2013 6 / 16

  7. The synchronous MoC We use the synchronous MoC Used in synchronous languages (i.e. Lustre) to guarantee real-time Combinatorial application in the synchronous MoC: Value 3 6 5 8 4 7 6 9 Event p +1 Tag 0 1 2 3 0 1 2 3 Application with memory in the synchronous MoC: 3 6 5 8 0 4 7 6 p dly +1 Tag 0 1 2 3 0 1 2 3 F. Robino (KTH) The HeartBeat model 11-07-2013 7 / 16

  8. From synchronous MoC to NoC-based MPSoC 3 6 5 8 0 4 7 6 p dly +1 Tag 0 1 2 3 0 1 2 3 3 6 5 8 0 4 7 6 Pe0 Pe1 p p dly dly +1 +1 Time 0 1 2 3 m s 0 1 2 3 m s F. Robino (KTH) The HeartBeat model 11-07-2013 8 / 16

  9. From synchronous MoC to NoC-based MPSoC We define an intermediate layer, the HeartBeat model: fills the abstraction gap adding details about timing and architecture enables the MPSoC to expose the same semantics of the MoC critical path (RTL, sea of gates) ⇋ HB period (MoC, sea of cores) H B p e r i o d P e 1 P e 0 3 6 0 4 7 9 5 8 ε p + 1 p . . . d l y + 1 c N o C 0 1 2 3 m s 0 1 2 3 m s H B t i c k s The HeartBeat model (for this simple example) M max m =0 ( t ǫ i + t c i ) t HB ≥ F. Robino (KTH) The HeartBeat model 11-07-2013 9 / 16

  10. A HW/SW co-design flow based on the HeartBeat model Graphical User Interface w Application view Platform view o l f d Scheduling Allocation n e Binding - t n o r F Process(es) functionality XML platform configuration C file (s) and process(es) mapping Back-end flow Software synthesis of C wrappers for MoC support NoC system Generator HeartBeat Target FPGA F. Robino (KTH) The HeartBeat model 11-07-2013 10 / 16

  11. SW synthesis technique Application view: synthesis of software to access NoC API and synchronize on HB tick Begin N Message Begin received? Initialize processes Y Execute user specified functionality HB tick N received? Previous process communication N concluded? Y Execute PE processes Pe0 Y p0_main p1_main Send result to next process ... End p n _main F. Robino (KTH) The HeartBeat model 11-07-2013 11 / 16

  12. HW synthesis technique Platform view: synthesis of NoC-based MPSoC with HeartBeat support A HW timer generates HB ticks The HB period (timer period) can be defined by the user, following the Heartbeat model Synthesized software P e 0 P e 1 P e 2 P e 3 HeartBeat P e 4 P e 5 P e 6 P e 7 F. Robino (KTH) The HeartBeat model 11-07-2013 12 / 16

  13. Case study A neural network, 4 layers, each layer 100 neurons Each layer on a separate PE (4 layers, 4 PEs, 2 × 2 NoC) Generation of files for prototype synthesis on FPGA < 1 second P0 P1 P2 P3 n0 n1 n99 Pe0 Pe0 w0 m f w1 u s HeartBeat SDA flow Pe0 Pe0 F. Robino (KTH) The HeartBeat model 11-07-2013 13 / 16

  14. Case study Optimize the application: find the minimal HB period of the system The HeartBeat model (for this simple example) M t HB ≥ max m =0 ( t ǫ i + t c i ) t ǫ i has been found through extensive emulations. Its value is 5,97 ms t c i can be found following models proposed in referenced papers The HeartBeat period is totally dominated by t ǫ i , it is an order of magnitude larger than t c i 1 Concluding the maximal HB frequency of the system is 5 , 97 ≃ 150 Hz F. Robino (KTH) The HeartBeat model 11-07-2013 14 / 16

  15. Results and related work Design flow MAMPS Our work Target platform 2 processors 4 processors Platform interconnection 2 × 1 NoC 2 × 2 NoC Creating system model manual(SDF) manual(SY) Creating application model manual semiautomatic Generating architecture model 1 second ∼ 100 millisec Mapping the design 1 minute manual Generate Xilinx/Altera project 16 seconds ∼ 500 millisec Table: SDA flows steps rapidity COMPSOC Open-Scale MAMPS Our work MoC entry HSDF KPN SDF Sync NoC arch. Mesh Mesh Mesh Mesh NoC dim. 2D 2D 2D 2D,3D API generation Y N N Y Prototype Y Y Y Y OS avail. Y Y N N Table: SDA flows properties comparison F. Robino (KTH) The HeartBeat model 11-07-2013 15 / 16

  16. Conclusion The HeartBeat model is an intermediate platform model bridging the abstraction gap between the synchronous MoC and a NoC-based MPSoC platform The HeartBeat model enables a SDA flow to synthesize an embedded application onto a NoC-based MPSoC on FPGA, provided that the timing constraints of the HeartBeat model are met The design flow reduces the complexity of designing embedded systems for NoC-based MPSoCs through a GUI The automated flow speeds up the design process of embedded systems. More info and tutorials https://forsyde.ict.kth.se/noc generator/ F. Robino (KTH) The HeartBeat model 11-07-2013 16 / 16

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