SLIM: Short Cycle Time and Low Inventory in Manufacturing at Samsung Electronics Corp., (SEC) 8/10/2020 SLIM Presentation 1
Introductions Prof. Rob Leachman, UCB IEOR Dept., technical author and SLIM project manager Dr. Jeenyoung Kang, Leachman & Associates LLC, technical author (UCB IEOR PhD ‘96) Dr. Vincent Lin, Leachman & Associates LLC, technical author (UCB IEOR PhD ‘99) Mr. J. W. Kim, SEC Executive VP Semiconductor Manufacturing, SLIM project sponsor 8/10/2020 SLIM Presentation 2
Introduction to SEC • Market share leader in DRAMs, SRAMs, TFT-LCDs • Design and fabrication of integrated circuits centered in Kiheung, Korea – 11 large fab lines, 20,000 employees – 500,000 wafers per month 8/10/2020 SLIM Presentation 3
SEC in Kiheung, Korea 8/10/2020 SLIM Presentation 4
The business problem • 1995: DRAM manufacturers enjoy record profits • At end of 1995, DRAM market changed from seller’s market to buyer’s market • Urgent need to reduce manufacturing cycle time 8/10/2020 SLIM Presentation 5
The business problem 8/10/2020 SLIM Presentation 6
The project • SLIM project initiated in March, 1996 • Ground rules: – joint effort of SEC and outside IE/OR experts – cycle time reduction as early as possible – consensus approval and credibility of solutions – no diminution of yields or productivity 8/10/2020 SLIM Presentation 7
Some fab terminology • Cycle time (a.k.a. lead time or flow time) • WIP (work-in-process) • Fab-out schedule • Steppers (photolithography machines, usually the fab bottleneck) 8/10/2020 SLIM Presentation 8
The challenge Fabrication of advanced memory devices • Re-entrant manufacturing process • Fragile manufacturing process 8/10/2020 SLIM Presentation 9
The challenge (cont.) Device Step Qualified Steppers XC 1.0 #2, #5, #68 ZB 1.0 #1, #2, #5 UC 1.0 #8, #9 SB 1.0 #1 XC 5.0 #61, #65, #86 8/10/2020 SLIM Presentation 10
SLIM scheduling principles 8/10/2020 SLIM Presentation 11
Conventional paradigm: lot-based dispatching • Scheduling objects: lots • Paradigm: when machine is idle, select suitable lot with the highest priority • Determine efficient priority rules – Most commonly, priority is given to lots determined to be behind schedule 8/10/2020 SLIM Presentation 12
Problems with conventional lot dispatching A-2 A-1 B-1 Machine M1 Machine M2 B-0 A-1 B-1 Start of Time shift Note: “A-1” denotes a lot of device A with a slack score = 1. Lot dispatching systems schedule too many changeovers. 8/10/2020 SLIM Presentation 13
More problems with lot dispatching Cycle time 3 2 1 0 to fab out A-1 A-4 A-3 A-2 Note: “A-1” denotes a lot of device A with slack = 1 B-3 B-2 B-1 A-1 is the wrong choice! Lot due dates become stale because of lots passing one another, changes to the fab out schedule, and downstream yield losses. 8/10/2020 SLIM Presentation 14
SLIM paradigm: manage WIP • Scheduling objects: device/steps • Paradigm: determine how many lots of each step of each device should be completed this shift, and allocate to machines intelligently • Maintain target WIP profile, maximize bottleneck throughput, and control frequency of recipe changes • Schedule non-production work, not just production 8/10/2020 SLIM Presentation 15
SLIM schedules A-1 A-1 A-2 Machine M1 Machine M2 B-0 B-1 B-1 Start of Time shift 8/10/2020 SLIM Presentation 16
Fab out schedule SLIM works to a target fab out schedule • Expressed through continuous-time for every device • Analyzed to be capacity-feasible and consistent with the WIP 8/10/2020 SLIM Presentation 17
Target cycle time • The target cycle time for each device is established according to standard learning curves: 2.5 Cycle time / mature cycle time Similar technology Different 2 Very different 1.5 1 1 2 3 4 5 6 7 8 9 10 Months since qualification 8/10/2020 SLIM Presentation 18
Target cycle time for steps • The process time plus material handling time for each step is termed the standard cycle time (sct) . • The difference between the target cycle time and the total standard cycle time for a device is its total buffer time (TBT) . • A key strategy of SLIM concerns how one allocates TBT among steps of the process flow... 8/10/2020 SLIM Presentation 19
Allocating buffer time Fab process Photo Photo Photo Photo Layer 1 Layer 2 Layer 3 Layer 4 WIP profile when there is no process or equipment trouble: 8/10/2020 SLIM Presentation 20
Allocating buffer time Process trouble Fab process Photo Photo Photo Photo Layer 1 Layer 2 Layer 3 Layer 4 WIP profile when there is process trouble: Layer 3 photo WIP running out 8/10/2020 SLIM Presentation 21
Target cycle time for steps • SLIM allocates TBT to steps according to statistics on actual cycle time. • Non-bottleneck steps are not allocated buffer time. • Bottleneck steps are allocated buffer time in proportion to the discrepancy between the upstream actual cycle time and the standard cycle time ... 8/10/2020 SLIM Presentation 22
Target cycle time for steps For bottleneck step on device , j i = + , where tct sct bt ij ij ij − ACT SCT ( ) ij ij = bt TBT ij i ( ) NB i ∑ − ACT SCT ij ij = 1 j and CT is the average actual cycle time and is the A SCT ij ij − total standard cycle time between bottleneck steps 1 and . j j 8/10/2020 SLIM Presentation 23
Target cycle time for steps (cont.) • Alternatively, if we have data on the standard deviation of layer cycle times, we could use that data to set target buffer times: σ ( ) = ij bt TBT ij i NB ∑ i σ ij = 1 j σ and is the standard deviation of actual cycle time between ij − bottleneck steps 1 and on product . j j i 8/10/2020 SLIM Presentation 24
Target cycle time proposed by others • Use a common multiple of theoretical cycle time, or • Set target proportional to actual or simulated average cycle time • Targets set this way average over events when the WIP is dislocated from where it is needed. They do not try to concentrate as much WIP in front of bottleneck steps downstream from trouble spots as does SLIM, and consequently they require more WIP to achieve a target level of utilization. 8/10/2020 SLIM Presentation 25
Ideal production quantity • IPQ of a device/step = how many units need to be completed by the end of the shift to meet the target cycle time and the target fab outs 1 2 3 4 5 6 7 8 9 Target cycle time Fab out schedule to fab out 8/10/2020 SLIM Presentation 26
Ideal production quantity • IPQ = (Target fab outs due until the target cycle time to fab out plus one shift) - (actual fab outs to date) - (actual downstream WIP) 1 2 3 4 5 6 7 8 9 Target cycle time Fab out schedule to fab out 8/10/2020 SLIM Presentation 27
Ideal production quantity • IPQ = (Target fab outs due until the target cycle time to fab out plus one shift) - (actual fab outs to date) - (actual downstream WIP) = IPQ ij + 0 . 33 TCTFO 0 N ij 1 i ( )( ) ∑ ∫ ∫ − − ( ) ( ) TFO t dt AFO t dt FY AW i i ik ik FY = + − ∞ − ∞ ij 1 k j 8/10/2020 SLIM Presentation 28
Schedule score • SS of device/step = how many days early or late is the current production of this device/step • SS = - IPQ / (Avg. fab out rate over cycle time to out) • SLIM prioritizes device/steps by SS , and strives to complete the IPQ for each device/step 8/10/2020 SLIM Presentation 29
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