QBF-BASED SYNTHESIS OF OPTIMAL WORD-SPLITTING IN APPROXIMATE - PowerPoint PPT Presentation

QBF-BASED SYNTHESIS OF OPTIMAL WORD-SPLITTING IN APPROXIMATE MULTI-LEVEL CELLS Daniel E. Holcomb Kevin Fu University of Michigan

2 March 2014 QBF Synthesis of Optimal Word-Splitting � 2 Motivation

2 March 2014 QBF Synthesis of Optimal Word-Splitting � 2 Motivation • Multi-level cells (MLCs) • Store 4 bits per cell using 16 discrete levels

2 March 2014 QBF Synthesis of Optimal Word-Splitting � 2 Motivation • Multi-level cells (MLCs) • Store 4 bits per cell using 16 discrete levels • Approximate computing • Save resources by allowing errors [Sampson et al. ’13] • Errors between nearby levels • But still want to minimize impact of errors

2 March 2014 QBF Synthesis of Optimal Word-Splitting � 2 Motivation • Multi-level cells (MLCs) • Store 4 bits per cell using 16 discrete levels • Approximate computing • Save resources by allowing errors [Sampson et al. ’13] • Errors between nearby levels • But still want to minimize impact of errors • Design decisions • Data words don't fit in one MLC • How to split word across multiple MLCs?

2 March 2014 QBF Synthesis of Optimal Word-Splitting � 3 Example MLCs: ??? ??? Data Word: Read Operation Write Operation

2 March 2014 QBF Synthesis of Optimal Word-Splitting � 3 Example MLCs: Data Word: Read Operation Write Operation

2 March 2014 QBF Synthesis of Optimal Word-Splitting � 3 Example MLCs: Data Word: Read Operation Write Operation

2 March 2014 QBF Synthesis of Optimal Word-Splitting � 3 Example MLCs: Data Word: Read Operation Write Operation

2 March 2014 QBF Synthesis of Optimal Word-Splitting � 3 Example MLCs: 0 1 1 0 0 0 0 0 Data Word: write 96 Read Operation Write Operation

2 March 2014 QBF Synthesis of Optimal Word-Splitting � 3 Example write 0 write 3 0 0 1 1 0 0 0 0 MLCs: 0 1 1 0 0 0 0 0 Data Word: write 96 Read Operation Write Operation

2 March 2014 QBF Synthesis of Optimal Word-Splitting � 3 Example write 0 read 4 read 0 write 3 0 0 1 1 0 0 0 0 0 1 0 0 0 0 0 0 MLCs: 0 1 1 0 0 0 0 0 Data Word: write 96 Read Operation Write Operation

2 March 2014 QBF Synthesis of Optimal Word-Splitting � 3 Example MLC error = 1 write 0 read 4 read 0 write 3 0 0 1 1 0 0 0 0 0 1 0 0 0 0 0 0 MLCs: 0 1 1 0 0 0 0 0 Data Word: write 96 Read Operation Write Operation

2 March 2014 QBF Synthesis of Optimal Word-Splitting � 3 Example MLC error = 1 write 0 read 4 read 0 write 3 0 0 1 1 0 0 0 0 0 1 0 0 0 0 0 0 MLCs: 0 1 1 0 0 0 0 0 0 0 0 1 0 0 0 0 Data Word: write 96 read 16 Read Operation Write Operation

2 March 2014 QBF Synthesis of Optimal Word-Splitting � 3 Example MLC error = 1 write 0 read 4 read 0 write 3 0 0 1 1 0 0 0 0 0 1 0 0 0 0 0 0 MLCs: 0 1 1 0 0 0 0 0 0 0 0 1 0 0 0 0 Data Word: write 96 read 16 Read Operation Write Operation word error = 80

2 March 2014 QBF Synthesis of Optimal Word-Splitting � 3 Example MLC error = 1 write 0 read 4 read 0 write 3 0 0 1 1 0 0 0 0 0 1 0 0 0 0 0 0 MLCs: Assuming a fixed upper bound on MLC error , can we find a mapping between data word and MLCs that minimizes worst-case word error ? 0 1 1 0 0 0 0 0 0 0 0 1 0 0 0 0 Data Word: write 96 read 16 Read Operation Write Operation word error = 80

2 March 2014 QBF Synthesis of Optimal Word-Splitting � 4 QBF Formulation of Word-Splitting C 1R C 0R S XBAR XBAR D W

2 March 2014 QBF Synthesis of Optimal Word-Splitting � 4 QBF Formulation of Word-Splitting • QBF: SAT with alternating quantifiers C 1R C 0R • Formulate QBF-based synthesis by way of combinational circuit S XBAR XBAR D W

2 March 2014 QBF Synthesis of Optimal Word-Splitting � 4 QBF Formulation of Word-Splitting • QBF: SAT with alternating quantifiers C 1R C 0R • Formulate QBF-based synthesis by way of combinational circuit • Crossbars implement mapping between data words and MLCs S XBAR XBAR • 64 bits specify xbar connections • 8-bit written dataword D W • 4-bit value read from each MLC

2 March 2014 QBF Synthesis of Optimal Word-Splitting � 4 QBF Formulation of Word-Splitting • QBF: SAT with alternating quantifiers C 1R C 0R • Formulate QBF-based synthesis by way C 0W C 1W of combinational circuit • Crossbars implement mapping between data words and MLCs S XBAR XBAR • 64 bits specify xbar connections • 8-bit written dataword D W D R • 4-bit value read from each MLC

2 March 2014 QBF Synthesis of Optimal Word-Splitting � 4 QBF Formulation of Word-Splitting • QBF: SAT with alternating quantifiers C 1R C 0R • Formulate QBF-based synthesis by way C 0W C 1W of combinational circuit • Crossbars implement mapping between data words and MLCs S XBAR XBAR • 64 bits specify xbar connections • 8-bit written dataword D W D R • 4-bit value read from each MLC • Check word and MLC error bounds

2 March 2014 QBF Synthesis of Optimal Word-Splitting � 4 QBF Formulation of Word-Splitting ( Φ MLC • QBF: SAT with alternating quantifiers C 1R C 0R • Formulate QBF-based synthesis by way C 0W C 1W of combinational circuit • Crossbars implement mapping between data words and MLCs S XBAR XBAR • 64 bits specify xbar connections • 8-bit written dataword D W D R • 4-bit value read from each MLC • Check word and MLC error bounds | C W − C R � � Φ MLC := 1 | ≤ E C ∧ 1 | C W − C R � � 0 | ≤ E C 0

2 March 2014 QBF Synthesis of Optimal Word-Splitting � 4 QBF Formulation of Word-Splitting ( Φ MLC • QBF: SAT with alternating quantifiers C 1R C 0R • Formulate QBF-based synthesis by way C 0W C 1W of combinational circuit • Crossbars implement mapping between data words and MLCs S XBAR XBAR • 64 bits specify xbar connections • 8-bit written dataword D W D R • 4-bit value read from each MLC Φ W ORD • Check word and MLC error bounds | C W − C R � � Φ MLC := 1 | ≤ E C ∧ 1 � | C W − C R � � 0 | ≤ E C 0 | D W − D R | ≤ E D � � Φ W ORD :=

2 March 2014 QBF Synthesis of Optimal Word-Splitting � 4 QBF Formulation of Word-Splitting ( Φ MLC • QBF: SAT with alternating quantifiers C 1R C 0R • Formulate QBF-based synthesis by way C 0W C 1W of combinational circuit • Crossbars implement mapping between data words and MLCs S XBAR XBAR • 64 bits specify xbar connections • 8-bit written dataword D W D R • 4-bit value read from each MLC Φ W ORD • Check word and MLC error bounds | C W − C R � � Φ MLC := 1 | ≤ E C • Gatewise translate circuit to CNF ∧ 1 � clauses | C W − C R � � 0 | ≤ E C 0 | D W − D R | ≤ E D � � Φ W ORD :=

2 March 2014 QBF Synthesis of Optimal Word-Splitting � 4 QBF Formulation of Word-Splitting ( Φ MLC • QBF: SAT with alternating quantifiers C 1R C 0R • Formulate QBF-based synthesis by way C 0W C 1W of combinational circuit • Crossbars implement mapping between data words and MLCs S XBAR XBAR • 64 bits specify xbar connections • 8-bit written dataword D W D R • 4-bit value read from each MLC Φ W ORD • Check word and MLC error bounds | C W − C R � � Φ MLC := 1 | ≤ E C • Gatewise translate circuit to CNF ∧ 1 � clauses | C W − C R � � 0 | ≤ E C 0 • Synthesis by solving Boolean formula | D W − D R | ≤ E D � � Φ W ORD := with appropriately quantified variables

2 March 2014 QBF Synthesis of Optimal Word-Splitting � 4 QBF Formulation of Word-Splitting ( Φ MLC • QBF: SAT with alternating quantifiers C 1R C 0R • Formulate QBF-based synthesis by way C 0W C 1W of combinational circuit • Crossbars implement mapping between data words and MLCs S XBAR XBAR • 64 bits specify xbar connections • 8-bit written dataword D W D R • 4-bit value read from each MLC Φ W ORD • Check word and MLC error bounds | C W − C R � � Φ MLC := 1 | ≤ E C • Gatewise translate circuit to CNF ∧ 1 � clauses | C W − C R � � 0 | ≤ E C 0 • Synthesis by solving Boolean formula | D W − D R | ≤ E D � � Φ W ORD := with appropriately quantified variables ∃ S ∀ D W ∀ C R 1 ∀ C R 0 ( Φ MLC = ⇒ Φ W ORD )

2 March 2014 QBF Synthesis of Optimal Word-Splitting � 4 QBF Formulation of Word-Splitting ( Φ MLC • QBF: SAT with alternating quantifiers • If QBF solution exists, C 1R C 0R • Formulate QBF-based synthesis by way C 0W C 1W solver produces of combinational circuit • Crossbars implement mapping assignment to between data words and MLCs S XBAR XBAR existentially quantified • 64 bits specify xbar connections variables • 8-bit written dataword D W D R • 4-bit value read from each MLC • This assignment Φ W ORD • Check word and MLC error bounds guarantees property | C W − C R � � Φ MLC := 1 | ≤ E C • Gatewise translate circuit to CNF ∧ 1 � clauses | C W − C R � � 0 | ≤ E C to always hold 0 • Synthesis by solving Boolean formula | D W − D R | ≤ E D � � Φ W ORD := with appropriately quantified variables ∃ S ∀ D W ∀ C R 1 ∀ C R 0 ( Φ MLC = ⇒ Φ W ORD )