Motivation Our Idea Generalization Results Fault Diagnosis Conclusion and Future Work Parametric Fault Diagnosis of Nonlinear Analog Circuits using Polynomial Coefficients Suraj Sindia Virendra Singh Vishwani D. Agrawal Analog Devices Indian Institute of Science Auburn University Bangalore, India Auburn, AL, USA 23 rd Intl. Conference on VLSI Design Bangalore, India Suraj Sindia @ VLSI Design 2010 Non-Linear Analog Circuit Diagnosis
Motivation Our Idea Generalization Results Fault Diagnosis Conclusion and Future Work Analog Circuit Testing To determine catastrophic (open or short) faults and fractional deviations in circuit components from their nominal values. Suraj Sindia @ VLSI Design 2010 Non-Linear Analog Circuit Diagnosis
Motivation Our Idea Generalization Results Fault Diagnosis Conclusion and Future Work Analog Circuit Testing To determine catastrophic (open or short) faults and fractional deviations in circuit components from their nominal values. In this talk To propose a method to detect & diagnose fractional deviations of circuit components from their nominal values in a large class of circuits. Suraj Sindia @ VLSI Design 2010 Non-Linear Analog Circuit Diagnosis
Motivation Our Idea Generalization Results Fault Diagnosis Conclusion and Future Work Outline Motivation 1 Our Idea 2 Generalization 3 Results 4 Fault Diagnosis 5 Conclusion and Future Work 6 Suraj Sindia @ VLSI Design 2010 Non-Linear Analog Circuit Diagnosis
Motivation Our Idea Generalization Results Fault Diagnosis Conclusion and Future Work Motivation Develop an Analog Circuit Test & Diagnosis Scheme Suitable for large class of circuits Suraj Sindia @ VLSI Design 2010 Non-Linear Analog Circuit Diagnosis
Motivation Our Idea Generalization Results Fault Diagnosis Conclusion and Future Work Motivation Develop an Analog Circuit Test & Diagnosis Scheme Suitable for large class of circuits Detects sufficiently small parametric faults Suraj Sindia @ VLSI Design 2010 Non-Linear Analog Circuit Diagnosis
Motivation Our Idea Generalization Results Fault Diagnosis Conclusion and Future Work Motivation Develop an Analog Circuit Test & Diagnosis Scheme Suitable for large class of circuits Detects sufficiently small parametric faults Small area overhead – requires little circuit augmentation Suraj Sindia @ VLSI Design 2010 Non-Linear Analog Circuit Diagnosis
Motivation Our Idea Generalization Results Fault Diagnosis Conclusion and Future Work Motivation Develop an Analog Circuit Test & Diagnosis Scheme Suitable for large class of circuits Detects sufficiently small parametric faults Small area overhead – requires little circuit augmentation Large number observables – handy in diagnosis Suraj Sindia @ VLSI Design 2010 Non-Linear Analog Circuit Diagnosis
Motivation Our Idea Generalization Results Fault Diagnosis Conclusion and Future Work Motivation Develop an Analog Circuit Test & Diagnosis Scheme Suitable for large class of circuits Detects sufficiently small parametric faults Small area overhead – requires little circuit augmentation Large number observables – handy in diagnosis Suraj Sindia @ VLSI Design 2010 Non-Linear Analog Circuit Diagnosis
Motivation Our Idea Generalization Results Fault Diagnosis Conclusion and Future Work Previous Approaches Important previous techniques I DDQ based test – Intrusive, Area overhead is high [Chakravarty ’97] Signal flow graph – Complexity order is high [Bushnell et al. ’97] Transfer function based test – Valid only for LTI systems [Savir and Guo ’03] Digital assisted analog test – Intrusive [Tim Cheng et al. ’06] Polynomial coefficient based test – DC test [Sindia et al. ’09] Suraj Sindia @ VLSI Design 2010 Non-Linear Analog Circuit Diagnosis
Motivation Our Idea Generalization Results Fault Diagnosis Conclusion and Future Work Transfer Function Coefficient Based Test R 1 R 2 V in V out C 1 C 2 Second order low pass filter 1 H ( s ) = ( R 1 R 2 C 1 C 2 ) s 2 + ( R 1 C 1 + ( R 1 + R 2 ) C 2 ) s + 1 Suraj Sindia @ VLSI Design 2010 Non-Linear Analog Circuit Diagnosis
Motivation Our Idea Generalization Results Fault Diagnosis Conclusion and Future Work Our Idea Taylor series expansion of circuit function about v in = 0 at Multi tones v out = f ( v in ) in + · · · + f ( n ) ( 0 ) v out = f ( 0 ) + f ′ ( 0 ) 1 ! v in + f ′′ ( 0 ) in + f ′′′ ( 0 ) v n 2 ! v 2 3 ! v 3 in + · · · n ! Suraj Sindia @ VLSI Design 2010 Non-Linear Analog Circuit Diagnosis
Motivation Our Idea Generalization Results Fault Diagnosis Conclusion and Future Work Our Idea Taylor series expansion of circuit function about v in = 0 at Multi tones v out = f ( v in ) in + · · · + f ( n ) ( 0 ) v out = f ( 0 ) + f ′ ( 0 ) 1 ! v in + f ′′ ( 0 ) in + f ′′′ ( 0 ) v n 2 ! v 2 3 ! v 3 in + · · · n ! Ignoring the higher order terms we have in + · · · + a n v n v out ≈ a 0 + a 1 v in + a 2 v 2 in where every a i ∈ ℜ and is bounded between its extreme values for a i , min < a i < a i , max ∀ i 0 ≤ i ≤ n Suraj Sindia @ VLSI Design 2010 Non-Linear Analog Circuit Diagnosis
Motivation Our Idea Generalization Results Fault Diagnosis Conclusion and Future Work Our Idea (Contd..) In a nutshell Find the V out v/s V in relationship at DC and “relevant” frequencies. Suraj Sindia @ VLSI Design 2010 Non-Linear Analog Circuit Diagnosis
Motivation Our Idea Generalization Results Fault Diagnosis Conclusion and Future Work Our Idea (Contd..) In a nutshell Find the V out v/s V in relationship at DC and “relevant” frequencies. Compute the coefficients of fault-free circuit Suraj Sindia @ VLSI Design 2010 Non-Linear Analog Circuit Diagnosis
Motivation Our Idea Generalization Results Fault Diagnosis Conclusion and Future Work Our Idea (Contd..) In a nutshell Find the V out v/s V in relationship at DC and “relevant” frequencies. Compute the coefficients of fault-free circuit Repeat the same for CUT by curve fitting the I/O response Suraj Sindia @ VLSI Design 2010 Non-Linear Analog Circuit Diagnosis
Motivation Our Idea Generalization Results Fault Diagnosis Conclusion and Future Work Our Idea (Contd..) In a nutshell Find the V out v/s V in relationship at DC and “relevant” frequencies. Compute the coefficients of fault-free circuit Repeat the same for CUT by curve fitting the I/O response Compare each of the obtained coefficients with fault-free circuit range Suraj Sindia @ VLSI Design 2010 Non-Linear Analog Circuit Diagnosis
Motivation Our Idea Generalization Results Fault Diagnosis Conclusion and Future Work Our Idea (Contd..) In a nutshell Find the V out v/s V in relationship at DC and “relevant” frequencies. Compute the coefficients of fault-free circuit Repeat the same for CUT by curve fitting the I/O response Compare each of the obtained coefficients with fault-free circuit range Classify CUT as Good or Bad Suraj Sindia @ VLSI Design 2010 Non-Linear Analog Circuit Diagnosis
Motivation Our Idea Generalization Results Fault Diagnosis Conclusion and Future Work Cascaded Amplifiers Vdd I M1 I M2 R1 R2 V out M1 M2 V in Two stage amplifier with 4 th degree non-linearity in V in v out = a 0 + a 1 v in + a 2 v 2 in + a 3 v 3 in + a 4 v 4 in Suraj Sindia @ VLSI Design 2010 Non-Linear Analog Circuit Diagnosis
Motivation Our Idea Generalization Results Fault Diagnosis Conclusion and Future Work Polynomial Coefficients 1 K 2 � W � W � ( V DD − V T ) 2 + R 2 � � 2 1 V 4 � a 0 = V DD − R 2 K L T � W L − 2 ( V DD − V T ) R 1 1 V 2 � L T 2 � W � � W � 2 � W � � � a 1 = R 2 K 4 R 2 1 K 2 V 3 T + 2 ( V DD − V T ) R 1 K V T L L L 2 1 1 � W � � W � W � 2 � � � a 2 = R 2 K 2 ( V DD − V T ) R 1 K − 6 R 2 1 K 2 V 2 T L L L 2 1 1 � W � 2 � W � 2 a 3 = 4 V T K 3 R 2 1 R 2 L L 1 2 � W � 2 � W � 2 a 4 = − K 3 R 2 1 R 2 L L 1 2 Suraj Sindia @ VLSI Design 2010 Non-Linear Analog Circuit Diagnosis
Motivation Our Idea Generalization Results Fault Diagnosis Conclusion and Future Work MSDF Calculation Definition Minimum Size Detectable Fault( ρ ) of a circuit parameter is defined as its minimum fractional deviation to force atleast one of the polynomial coefficients out of its fault free range Suraj Sindia @ VLSI Design 2010 Non-Linear Analog Circuit Diagnosis
Motivation Our Idea Generalization Results Fault Diagnosis Conclusion and Future Work MSDF Calculation Definition Minimum Size Detectable Fault( ρ ) of a circuit parameter is defined as its minimum fractional deviation to force atleast one of the polynomial coefficients out of its fault free range Overview of MSDF calculation of R1 with V DD =1.2V, V T = � W � � W � 2 = 20, and K = 100 µ A / V 2 1 = 1 400mV, L L 2 Suraj Sindia @ VLSI Design 2010 Non-Linear Analog Circuit Diagnosis
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