On Combining 01X-Logic and QBF Marc Herbstritt (joint work with - PowerPoint PPT Presentation

On Combining 01X-Logic and QBF Marc Herbstritt (joint work with Bernd Becker) Institute of Computer Science Albert-Ludwigs-University Freiburg im Breisgau, Germany Presentation at EuroCAST 2007 Applied Formal Verification Track Feb 14 2007 www.avacs.org

Background Formal Verification of Circuits → Checking correctness between specification and implementation Model Checking → Specification given by a set of (temporal) properties → Model Checking to prove that circuit model fulfills the properties → Bounded Model Checking to falsify properties Blackbox Designs → describe partial circuit implementations → occur naturally in early design phase → can be used for abstraction This work: → Bounded Model Checking of Blackbox Designs (BB-BMC) → Merge two approaches for BB-BMC: 01X-logic and QBF → Flexibility to counteract computational complexity of QBF � Marc Herbstritt (University Freiburg) c On Combining 01X-Logic and QBF AFV@EuroCAST’07 2 / 14

Background Formal Verification of Circuits → Checking correctness between specification and implementation Model Checking → Specification given by a set of (temporal) properties → Model Checking to prove that circuit model fulfills the properties → Bounded Model Checking to falsify properties Blackbox Designs → describe partial circuit implementations → occur naturally in early design phase → can be used for abstraction This work: → Bounded Model Checking of Blackbox Designs (BB-BMC) → Merge two approaches for BB-BMC: 01X-logic and QBF → Flexibility to counteract computational complexity of QBF � Marc Herbstritt (University Freiburg) c On Combining 01X-Logic and QBF AFV@EuroCAST’07 2 / 14

Background Formal Verification of Circuits → Checking correctness between specification and implementation Model Checking → Specification given by a set of (temporal) properties → Model Checking to prove that circuit model fulfills the properties → Bounded Model Checking to falsify properties Blackbox Designs → describe partial circuit implementations → occur naturally in early design phase → can be used for abstraction This work: → Bounded Model Checking of Blackbox Designs (BB-BMC) → Merge two approaches for BB-BMC: 01X-logic and QBF → Flexibility to counteract computational complexity of QBF � Marc Herbstritt (University Freiburg) c On Combining 01X-Logic and QBF AFV@EuroCAST’07 2 / 14

Background Formal Verification of Circuits → Checking correctness between specification and implementation Model Checking → Specification given by a set of (temporal) properties → Model Checking to prove that circuit model fulfills the properties → Bounded Model Checking to falsify properties Blackbox Designs → describe partial circuit implementations → occur naturally in early design phase → can be used for abstraction This work: → Bounded Model Checking of Blackbox Designs (BB-BMC) → Merge two approaches for BB-BMC: 01X-logic and QBF → Flexibility to counteract computational complexity of QBF � Marc Herbstritt (University Freiburg) c On Combining 01X-Logic and QBF AFV@EuroCAST’07 2 / 14

Overview Introduction 1 An Example: Equivalence Checking of Blackbox Designs 2 Combining 01X-Logic and QBF 3 Application to Bounded Model Checking of Blackbox Designs 4 Experimental Results 5 Conclusions 6

Applications of Blackbox Designs: ISCAS c3540 Shifter MUX A MUX B MUX BCD−SUB BCD−ADD ALU MUX C3540: ALU with binary and BCD arithmetic, logic and shift operations. (Source: Hansen, Yalcin, Hayes − Unveiling the ISCAS85 Benchmarks, IEEE Design&Test, 1999) Abstraction: Hide components that are not necessary 1 Verification of Partial Designs: E.g. in early design stage 2 Error Diagnosis: Localisation of error 3 � Marc Herbstritt (University Freiburg) c On Combining 01X-Logic and QBF AFV@EuroCAST’07 4 / 14

Applications of Blackbox Designs: ISCAS c3540 op(A,B,+,bin) = enc(A,bin) + enc(B,bin) ? Shifter MUX A MUX B MUX BCD−SUB BCD−ADD ALU MUX Abstraction: Hide components that are not necessary 1 Verification of Partial Designs: E.g. in early design stage 2 Error Diagnosis: Localisation of error 3 � Marc Herbstritt (University Freiburg) c On Combining 01X-Logic and QBF AFV@EuroCAST’07 4 / 14

Applications of Blackbox Designs: ISCAS c3540 op(A,B,+, ) = bin enc(A, ) + enc(B, ) ? bin bin Blackbox A MUX MUX B MUX Blackbox Blackbox ALU Property is not dependent MUX on BCD−units and Shifter, but only on encoding binary Abstraction: Hide components that are not necessary 1 Verification of Partial Designs: E.g. in early design stage 2 Error Diagnosis: Localisation of error 3 � Marc Herbstritt (University Freiburg) c On Combining 01X-Logic and QBF AFV@EuroCAST’07 4 / 14

Applications of Blackbox Designs: ISCAS c3540 op(A,B,+,bin) = enc(A,bin) + enc(B,bin) ? Blackbox A MUX MUX B MUX Blackbox BCD−ADD ALU Implementation of Shifter and MUX BCD−SUB unit not finished Abstraction: Hide components that are not necessary 1 Verification of Partial Designs: E.g. in early design stage 2 Error Diagnosis: Localisation of error 3 � Marc Herbstritt (University Freiburg) c On Combining 01X-Logic and QBF AFV@EuroCAST’07 4 / 14

Applications of Blackbox Designs: ISCAS c3540 Shifter A MUX MUX B Blackbox MUX BCD−SUB ALU MUX Check whether error lies within the blackbox region Abstraction: Hide components that are not necessary 1 Verification of Partial Designs: E.g. in early design stage 2 Error Diagnosis: Localisation of error 3 � Marc Herbstritt (University Freiburg) c On Combining 01X-Logic and QBF AFV@EuroCAST’07 4 / 14

Combinational Equivalence Checking using 01X-Logic x 1 x 2 x 3 x 4 x 1 x 2 x 3 x 4 f S f BB 1 be completed such that f S and f BB Can f BB are equal, 1 1 or are f S and f BB already different? 1 � Marc Herbstritt (University Freiburg) c On Combining 01X-Logic and QBF AFV@EuroCAST’07 5 / 14

Combinational Equivalence Checking using 01X-Logic 01X-Logic (Jain et al., VTS’00) Introduce logical value X , i.e., X means unknown Binary encoding of logical values: 01X-value binary encoding 0 (1,0) 1 (0,1) X (0,0) Adapt synthesis operators: AND 01X (( a 0 , a 1 ) , ( b 0 , b 1 )) := ( a 0 + b 0 , a 1 · b 1 ) OR 01X (( a 0 , a 1 ) , ( b 0 , b 1 )) := ( a 0 · b 0 , a 0 + b 0 ) NOT 01X (( a 0 , a 1 )) := ( a 1 , a 0 ) � Marc Herbstritt (University Freiburg) c On Combining 01X-Logic and QBF AFV@EuroCAST’07 5 / 14

Combinational Equivalence Checking using 01X-Logic 0 1 0 1 0 1 0 1 x 1 x 1 x x x x x x 0 0 2 2 3 3 4 4 Build miter for f S and f BB ENC−OR ENC−AND 1 Replace blackbox output by ENC−XOR new logical value X XEK XEK Encode miter circuit using ENC−OR ENC−AND AND 01X , OR 01X , and NOT 01X Solve propositional problem ENC−OR ENC−AND ⇒ ( 0 , 0 , 1 , 0 ) is a counterexample ENC−XOR [ f S ( 0 , 0 , 1 , 0 ) = 1 � = 0 = f BB XEK XEK 1 ( 0 , 0 , 1 , 0 )] M,0 M,1 f f Propositional problem to solve ∃ x 0 1 x 1 1 x 0 2 x 1 2 x 0 3 x 1 3 x 0 4 x 1 4 : (( ¬ f M , 0 ) · f M , 1 )( x 0 1 , x 1 1 , x 0 2 , x 1 2 , x 0 3 , x 1 3 , x 0 4 , x 1 4 ) = 1 . � Marc Herbstritt (University Freiburg) c On Combining 01X-Logic and QBF AFV@EuroCAST’07 5 / 14

Inaccuracy of 01X-Logic and the Demand for QBF x 1 x 2 x 3 x 4 x 1 x 2 x 3 x 4 f S f BB , 01X x 1 x 2 x 3 x 4 3 0000 0 X 0001 0 X 0010 1 1 0011 1 1 0100 1 1 0101 1 1 0110 1 X 0111 1 X 1000 1 1 1001 1 1 1010 1 1 1011 1 1 1100 1 1 1101 1 1 1110 1 1 1111 1 1 f S f BB 3 No counterexample can be found using 01X-logic. � Marc Herbstritt (University Freiburg) c On Combining 01X-Logic and QBF AFV@EuroCAST’07 6 / 14

Inaccuracy of 01X-Logic and the Demand for QBF QBF counterexample formulation Instead of new logical value X , introduce fresh propositional variables Z i for blackbox output i Counterexample (CE): An input assignment such that for all values of the blackbox ouputs Z i , f S and f BB differ. 3 ∃ x 1 x 2 x 3 x 4 ∀ Z 1 : f S ( x 1 , x 2 , x 3 , x 4 ) � = f BB 3 ( x 1 , x 2 , x 3 , x 4 , Z 1 ) ⇒ ( 0 , 1 , 1 , 0 ) is a counterexample. � Marc Herbstritt (University Freiburg) c On Combining 01X-Logic and QBF AFV@EuroCAST’07 6 / 14

Multiple Blackboxes: Combining 01X-Logic and QBF x 1 x 2 x 3 x 4 x 1 x 2 x 3 x 4 BB BB 1 2 f S f BB 4 QBF formulation finds counterexample ∃ x 1 x 2 x 3 x 4 ∀ Z 1 Z 2 : f S ( x 1 , x 2 , x 3 , x 4 ) � = f BB 4 ( x 1 , x 2 , x 3 , x 4 , Z 1 , Z 2 ) ( 0 , 0 , 0 , 0 ) is a counterexample. � Marc Herbstritt (University Freiburg) c On Combining 01X-Logic and QBF AFV@EuroCAST’07 7 / 14

Multiple Blackboxes: Combining 01X-Logic and QBF f BB f BB f S x 1 x 2 x 3 x 4 4 4 ( Z 1 , Z 2 -var) ( Z 1 -var + 01X) 0 0 0 0 0 1 1 0 0 0 1 0 1 1 0 0 1 0 1 1 1 0 0 1 1 1 1 1 0 1 0 0 1 1 1 0 1 0 1 1 1 1 0 1 1 0 1 1 1 0 1 1 1 1 1 1 1 0 0 0 1 1 1 1 0 0 1 1 1 1 1 0 1 0 1 1 1 1 0 1 1 1 1 1 1 1 0 0 1 1 1 1 1 0 1 1 1 1 1 1 1 0 1 1 1 1 1 1 1 1 1 1 Mixing 01X-Logic and QBF formulation BB 2 can be modelled using 01X-logic ⇒ ( 0 , 0 , 0 , 0 ) is CE. ∃ x 1 x 2 x 3 x 4 ∀ Z 1 : f S ( x 1 , x 2 , x 3 , x 4 ) � = f BB 4 ( x 1 , x 2 , x 3 , x 4 , Z 1 , X ) But how to combine 01X-logic and QBF? � Marc Herbstritt (University Freiburg) c On Combining 01X-Logic and QBF AFV@EuroCAST’07 7 / 14