modeling of time in discrete event simulation of systems
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jTLM Duration Applications Implementation Conclusion Modeling of Time in Discrete-Event Simulation of Systems-on-Chip Giovanni Funchal 1 , 2 and Matthieu Moy 1 1 Verimag (Grenoble INP) Grenoble, France 2 STMicroelectronics Grenoble, France


  1. jTLM Duration Applications Implementation Conclusion Modeling of Time in Discrete-Event Simulation of Systems-on-Chip Giovanni Funchal 1 , 2 and Matthieu Moy 1 1 Verimag (Grenoble INP) Grenoble, France 2 STMicroelectronics Grenoble, France Work partially supported by HELP ANR project MEMOCODE, July 2011 Matthieu Moy (Verimag) Modeling of Time/jTLM MEMOCODE, July 2011 < 1 / 22 >

  2. jTLM Duration Applications Implementation Conclusion Outline Transaction Level Modeling and jTLM 1 Time and Duration in jTLM 2 Applications 3 Implementation 4 Conclusion 5 Matthieu Moy (Verimag) Modeling of Time/jTLM MEMOCODE, July 2011 < 2 / 22 >

  3. jTLM Duration Applications Implementation Conclusion Outline Transaction Level Modeling and jTLM 1 Time and Duration in jTLM 2 Applications 3 Implementation 4 Conclusion 5 Matthieu Moy (Verimag) Modeling of Time/jTLM MEMOCODE, July 2011 < 3 / 22 >

  4. jTLM Duration Applications Implementation Conclusion Modern Systems-on-a-Chip Matthieu Moy (Verimag) Modeling of Time/jTLM MEMOCODE, July 2011 < 4 / 22 >

  5. jTLM Duration Applications Implementation Conclusion Modern Systems-on-a-Chip Software Hardware Matthieu Moy (Verimag) Modeling of Time/jTLM MEMOCODE, July 2011 < 4 / 22 >

  6. jTLM Duration Applications Implementation Conclusion Transaction-Level Modeling (Fast) simulation essential in the design-flow ◮ To write/debug software ◮ To validate architectural choices ◮ As reference for hardware verification Matthieu Moy (Verimag) Modeling of Time/jTLM MEMOCODE, July 2011 < 5 / 22 >

  7. jTLM Duration Applications Implementation Conclusion Transaction-Level Modeling (Fast) simulation essential in the design-flow ◮ To write/debug software ◮ To validate architectural choices ◮ As reference for hardware verification Transaction-Level Modeling (TLM): ◮ High level of abstraction ◮ Suitable for Matthieu Moy (Verimag) Modeling of Time/jTLM MEMOCODE, July 2011 < 5 / 22 >

  8. jTLM Duration Applications Implementation Conclusion Transaction-Level Modeling (Fast) simulation essential in the design-flow ◮ To write/debug software ◮ To validate architectural choices ◮ As reference for hardware verification Transaction-Level Modeling (TLM): ◮ High level of abstraction ◮ Suitable for Industry Standard = SystemC/TLM Matthieu Moy (Verimag) Modeling of Time/jTLM MEMOCODE, July 2011 < 5 / 22 >

  9. jTLM Duration Applications Implementation Conclusion SystemC/TLM vs. “TLM Abstraction Level” SystemC TLM Matthieu Moy (Verimag) Modeling of Time/jTLM MEMOCODE, July 2011 < 6 / 22 >

  10. jTLM Duration Applications Implementation Conclusion SystemC/TLM vs. “TLM Abstraction Level” SystemC TLM Cycle accurate TLM RTL 2.0 Gate level Matthieu Moy (Verimag) Modeling of Time/jTLM MEMOCODE, July 2011 < 6 / 22 >

  11. jTLM Duration Applications Implementation Conclusion SystemC/TLM vs. “TLM Abstraction Level” SystemC TLM Cycle accurate TLM ? RTL 2.0 Gate level Matthieu Moy (Verimag) Modeling of Time/jTLM MEMOCODE, July 2011 < 6 / 22 >

  12. jTLM Duration Applications Implementation Conclusion SystemC/TLM vs. “TLM Abstraction Level” SystemC TLM Cycle Parallelism accurate Clocks Function TLM ? RTL calls 2.0 Coroutine semantics Gate δ -cycle level Matthieu Moy (Verimag) Modeling of Time/jTLM MEMOCODE, July 2011 < 6 / 22 >

  13. jTLM Duration Applications Implementation Conclusion SystemC/TLM vs. “TLM Abstraction Level” SystemC TLM jTLM = Cycle Parallelism this talk accurate Clocks Function TLM ? RTL calls 2.0 Coroutine semantics Gate δ -cycle level Matthieu Moy (Verimag) Modeling of Time/jTLM MEMOCODE, July 2011 < 6 / 22 >

  14. jTLM Duration Applications Implementation Conclusion jTLM: goals and peculiarities jTLM’s goal: define “TLM” independently of SystemC ◮ Not cooperative (true parallelism) ◮ Not C++ (Java) ◮ No δ -cycle Interesting features ◮ Small and simple code ( ≈ 500 LOC) ◮ Nice experimentation platform Not meant for production Matthieu Moy (Verimag) Modeling of Time/jTLM MEMOCODE, July 2011 < 7 / 22 >

  15. jTLM Duration Applications Implementation Conclusion Outline Transaction Level Modeling and jTLM 1 Time and Duration in jTLM 2 Applications 3 Implementation 4 Conclusion 5 Matthieu Moy (Verimag) Modeling of Time/jTLM MEMOCODE, July 2011 < 8 / 22 >

  16. jTLM Duration Applications Implementation Conclusion Simulation Time Vs Wall-Clock Time Wall-clock time Time elapse Computation 0 10 20 30 40 Simulation time Matthieu Moy (Verimag) Modeling of Time/jTLM MEMOCODE, July 2011 < 9 / 22 >

  17. jTLM Duration Applications Implementation Conclusion Time in SystemC and jTLM SystemC A B P jTLM Q Matthieu Moy (Verimag) Modeling of Time/jTLM MEMOCODE, July 2011 < 10 / 22 >

  18. jTLM Duration Applications Implementation Conclusion Time in SystemC and jTLM Process A: // computation SystemC A f(); // time taken by f B wait(20, SC_NS); P jTLM Q Matthieu Moy (Verimag) Modeling of Time/jTLM MEMOCODE, July 2011 < 10 / 22 >

  19. jTLM Duration Applications Implementation Conclusion Time in SystemC and jTLM f() Process A: wait(20) // computation SystemC A f(); // time taken by f B wait(20, SC_NS); P jTLM Q Matthieu Moy (Verimag) Modeling of Time/jTLM MEMOCODE, July 2011 < 10 / 22 >

  20. jTLM Duration Applications Implementation Conclusion Time in SystemC and jTLM f() Process A: wait(20) // computation SystemC A f(); // time taken by f B wait(20, SC_NS); g() Process P: awaitTime g(); P jTLM awaitTime(20); Q Matthieu Moy (Verimag) Modeling of Time/jTLM MEMOCODE, July 2011 < 10 / 22 >

  21. jTLM Duration Applications Implementation Conclusion Time in SystemC and jTLM f() Process A: wait(20) // computation SystemC A f(); // time taken by f B wait(20, SC_NS); g() Process P: awaitTime g(); h() P jTLM awaitTime(20); consumesTime(15) { Q h(); } Matthieu Moy (Verimag) Modeling of Time/jTLM MEMOCODE, July 2011 < 10 / 22 >

  22. jTLM Duration Applications Implementation Conclusion Time in SystemC and jTLM f() Process A: wait(20) // computation SystemC A f(); // time taken by f B wait(20, SC_NS); g() Process P: awaitTime g(); h() P jTLM awaitTime(20); consumesTime(15) { Q i() j() h(); } Matthieu Moy (Verimag) Modeling of Time/jTLM MEMOCODE, July 2011 < 10 / 22 >

  23. jTLM Duration Applications Implementation Conclusion Time à la SystemC: awaitTime(T) Wall-clock time Time elapse By default, time does not pass Computation ⇒ instantaneous tasks awaitTime(T) : 0 10 20 30 40 let other processes execute Simulation time for T time units f(); // instantaneous awaitTime(20); Matthieu Moy (Verimag) Modeling of Time/jTLM MEMOCODE, July 2011 < 11 / 22 >

  24. jTLM Duration Applications Implementation Conclusion Task with Known Duration: consumesTime(T) Semantics: consumesTime(15) { ◮ Start and end dates known ◮ Actions contained in task spread in f1(); between f2(); Advantages: f3(); ◮ Model closer to actual system } ◮ Less bugs hidden consumesTime(10) { ◮ Better parallelization g(); } Matthieu Moy (Verimag) Modeling of Time/jTLM MEMOCODE, July 2011 < 12 / 22 >

  25. jTLM Duration Applications Implementation Conclusion Execution of consumesTime(T) Fast computation Slow computation Simulation Computation Task Wall-clock time Task Wall-clock time time finishes ends finishes blocked Rest of the platform drives time Task starts Task starts 0 10 20 30 40 0 10 20 30 40 Simulation time Simulation time idle Matthieu Moy (Verimag) Modeling of Time/jTLM MEMOCODE, July 2011 < 13 / 22 >

  26. jTLM Duration Applications Implementation Conclusion Outline Transaction Level Modeling and jTLM 1 Time and Duration in jTLM 2 Applications 3 Implementation 4 Conclusion 5 Matthieu Moy (Verimag) Modeling of Time/jTLM MEMOCODE, July 2011 < 14 / 22 >

  27. jTLM Duration Applications Implementation Conclusion Exposing Bugs Example bug: mis-placed synchronization: flag = true; while(!flag) awaitTime(5); awaitTime(1); || writeIMG(); awaitTime(10); awaitTime(10); readIMG(); ⇒ bug never seen in simulation Matthieu Moy (Verimag) Modeling of Time/jTLM MEMOCODE, July 2011 < 15 / 22 >

  28. jTLM Duration Applications Implementation Conclusion Exposing Bugs Example bug: mis-placed synchronization: flag = true; while(!flag) awaitTime(5); awaitTime(1); || writeIMG(); awaitTime(10); awaitTime(10); readIMG(); ⇒ bug never seen in simulation consumesTime(15) { while(!flag) flag = true; awaitTime(1); || writeIMG(); awaitTime(10); } readIMG(); ⇒ strictly more behaviors, including the buggy one Matthieu Moy (Verimag) Modeling of Time/jTLM MEMOCODE, July 2011 < 15 / 22 >

  29. jTLM Duration Applications Implementation Conclusion Parallelization P1 jTLM’s Semantics P2 Simultaneous tasks run in parallel P3 P4 Matthieu Moy (Verimag) Modeling of Time/jTLM MEMOCODE, July 2011 < 16 / 22 >

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