Micro Processor & Controller Organization Organization Outline - - PowerPoint PPT Presentation

Micro Processor & Controller Organization Organization

Outline Outline � Project Examples – CPU 8, 16, 32 Bits – FPU � General Architecture of Computer – CPU - MEM - I/O – Peripheral � Memory Hierarchy – Main Memory – Auxiliary Memory

Considerations Considerations � Compromise between – Performance (Memory, Speed) – Price – Size – Power consumption – Development Tools – Examples – Support

PIC16 – – 8 bits DIP CPU : Sniff Probe 8 bits DIP CPU : Sniff Probe PIC16

PIC18 – – 8 bits PLCC CPU : Pulse Generator 8 bits PLCC CPU : Pulse Generator PIC18

MSP430 – – 16 bits CPU : Drug Detector 16 bits CPU : Drug Detector MSP430

C28335 Delfino Delfino – – 32 bits CPU + FPU 32 bits CPU + FPU C28335

Concerto F28M35 Dual Core – – 32 bits M3+C28 32 bits M3+C28 Concerto F28M35 Dual Core

TMS320DM6437 32/64 bits + DDR2 Memory TMS320DM6437 32/64 bits + DDR2 Memory

CPU - - Memory Memory - - I/O I/O CPU ROM A.B. D.B. RAM Memory A.B. RD I/O Map D.B. WR RD CS FLASH WR MEM CPU IO Keyboard A.B. D.B. Printer I/O Pripheral RD Mouse WR CS More ...

Controller = CPU + Memory + Peripheral Controller = CPU + Memory + Peripheral ROM A.B. D.B. RAM RD EPROM Register WR A.B. CS D.B. FLASH ALU RD FPU WR Timer A.B. CS FLAGS D.B. ADC RD PWM WR CS UART

Memory Hierarchy Memory Hierarchy Register CPU Inside CPU Internal or Static RAM Cache L1 External Bus Cache L2 DRAM, ROM, EPROM, FLASH Main Mem I/O Boundary IDE, SCSI, SATA Hard Disk Magnetic Media ZIP, JAZ, LS-120 I / O Mapping Magnetic Tapes DAT, Analog Devices Optical Media CD-ROM, CDR, CDRW, DVD Floppy Disk Zevel

I/O Bus and Interface I/O Bus and Interface Data Bus Addr Bus CPU Control Interface Interface Interface Interface Keyboard USB Hard Printer & or Disk Display LAN