CS 4410 Operating Systems Memory: Paging Summer 2011 Cornell University 1
Today ● What is paging and why do we need it? ● Paging ● Address translation scheme ● Page table ● Implementation of page table ● TLB ● Structure of page table in memory 2
Paging ● Memory management scheme. ● Noncontiguous physical address space of a process. ● The process is allocated physical memory wherever the latter is available. ● It avoids external fragmentation. 3
Paging ● Divide physical memory into fixed-sized blocks called frames (size is power of 2, between 512 bytes and 8,192 bytes) ● Divide logical memory into blocks of same size called pages ● Keep track of all free frames.To run a program of size n pages, need to find n free frames and load program ● Set up a page table to translate logical to physical addresses 4
Paging 5
Address Translation Scheme ● Address generated by CPU is divided into: ● Page number ( p ) – used as an index into a page table which contains base address of each page in physical memory ● Page offset (d) – combined with base address to define the physical memory address that is sent to the memory unit page page number offset p d m - n n 6
Address Translation Scheme 7
Address Translation Scheme 00000 0000 a 0001 b 00100 i 0010 c j 0011 d k l 0100 e 01000 m 0101 f n 0110 g o 00 101 0111 h p physical 01 110 1000 i 01100 memory 10 001 1001 j 11 010 1010 k 1011 l 10000 page table 1100 m 1101 n 10100 a 1110 o b 1111 p c d 8 logical memory 11000 e f g
Paging ● User's view: memory is one single space ● Actual view: the program is scattered throughout physical memory ● The OS manages physical memory. ● Frame table: Availability and owner of every frame 9
Hardware Support ● The OS allocates one page table per process. ● A pointer to the page table is stored in the PCB. ● The dispatcher defines the correct hardware page-table values. 10
Implementation of page table Set of dedicated registers. ● Fast ● Small ● In memory ● Page-table base register (PTBR) ● Slow ● Large ● TLB + memory ● Translation look-aside buffer ● Special, small, fast-lookup hardware cache ● Contains a few of the page-table entries ● If page_number is in TLB get frame_number out ● 11
Paging Hardware With TLB 12
Memory Protection ● Implemented by associating protection bit with each frame. 13
Shared Pages ● Shared code ● One copy of read-only (reentrant) code shared among processes (i.e., text editors, compilers, window systems). ● Shared code must appear in same location in the logical address space of all processes ● Private code and data ● Each process keeps a separate copy of the code and data ● The pages for the private code and data can appear anywhere in the logical address space 14
Structure of the Page Table ● Hierarchical Paging ● Hashed Page Tables ● Inverted Page Tables 15
Hierarchical Paging 16
Hierarchical Paging Two-Level Paging Example ● A logical address (on 32-bit machine with 4K page size) is divided into: ● a page offset of 12 bits ● a page number of 20 bits ● Since the page table is paged, the page number is further divided into: ● a 10-bit page number ● a 10-bit page offset ● Thus, a logical address is as follows: ● page offset page number p 2 p 1 d 12 10 10 17
Hierarchical Paging 18
Hashed Page Tables ● Common in address spaces > 32 bits ● The virtual page number is hashed into a page table. This page table contains a chain of elements hashing to the same location. ● Virtual page numbers are compared in this chain searching for a match. If a match is found, the corresponding physical frame is extracted. 19
Hashed Page Tables 20
Inverted Page Table ● One entry for each real page of memory. ● Entry consists of the virtual address of the page stored in that real memory location, with information about the process that owns that page. ● Decreases memory needed to store each page table, but increases time needed to search the table when a page reference occurs. ● Use hash table to limit the search to one — or at most a few — page-table entries. 21
Inverted Page Table 22
Today ● What is paging and why do we need it? ● Paging ● Address translation scheme ● Page table ● Implementation of page table ● TLB ● Structure of page table in memory 23
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