IoT Operating Systems Chenyang Lu 1
Critiques Ø 1/2 page critiques of research papers Ø Due at 10am on the class day (hard deadline) Ø Email Corey <dairuixuan@wustl.edu> in plain txt Ø Back-of-envelop notes - NOT whole essays Ø Guidelines: http://www.cs.wustl.edu/%7Elu/cse521s/critique.html 2
Critique #1 (IoT OS) Ø Due on 9/24 Ø D. Gay, P. Levis, R. von Behren, M. Welsh, E. Brewer, and D. Culler, The nesC Language: A Holistic Approach to Networked Embedded Systems, ACM Conference on Programming Language Design and Implementation (PLDI), June 2003. Chenyang Lu 3
Critique #2 (Wireless) Ø Due on 10/15 Ø M. Buettner, G.V. Yee, E. Anderson and R. Han, X-MAC: a Short Preamble MAC Protocol for Duty-Cycled Wireless Sensor Networks, ACM Conference on Embedded Networked Sensor Systems (SenSys), November 2006. Chenyang Lu 4
Proposal Presentation Ø In class on 10/1 Ø 7 min per group q 6-min talk + 1-min Q&A q 4 slides q Rehearse over Zoom q Turn on your video during your presentation Ø Your elevator pitch! Ø Email Corey your slides before class 5
Written Proposal Ø One proposal/team, one page q Team members q Concise description of project q Responsibilities of each member q Equipment needed Ø Written proposal due: 10/1, 11:59pm q Email to Corey 6
Demo I Ø In class on 10/27 and 10/29 . Ø 15 min per team. Ø Must show something real . Ø Send Corey a video before class as backup. 7
Demo II Ø In class on 11/17 and 11/19 . Ø 15 min per team. Ø Substantial progress à final demo. Ø Send Corey a video before class as backup. 8
IoT OS Ø Linux Ø Windows 10 IoT Core: Windows 10 optimized for ARM and x86/x64. Ø Amazon FreeRTOS: open-source FreeRTOS kernel + libraries to securely connect devices to AWS cloud services. Ø Arm Mbed: open-source OS for Arm Cortex-M microcontrollers. Ø Contiki: open-source, multi-threaded OS. Chenyang Lu 9
Amazon FreeRTOS https://aws.amazon.com/freertos Chenyang Lu 10
Diverse Platforms TelosB Ø TI MSP430 microcontroller, 4/8 MHz, 8 bit Ø Memory: 10KB data, 48 KB program Ø IEEE 802.15.4 radio: max 250 Kbps Raspberry Pi 4 Ø Quad core Cortex-A72 64-bit SoC, 1.5GHz Ø 2GB-8GB SDRAM Ø IEEE 802.11ac wireless, Bluetooth 5.0, BLE Ø Gigabit Ethernet Chenyang Lu 11
Epic Core 3 V I/O (some shared) RAM 10 KB 8 ADC (12 bit) 2 DAC (12 bit) Unique Flash 48 KB 1 I2C hardware ID 2.5 x 2.5 cm 1 JTAG 1 1-Wire TI MSP430 2 SPI 2 UART CC2420 radio 16 MB 802.15.4 Clock 4/8 MHz Flash memory 8 general, 8 6LoWPAN/IPv6 interrupt, and 5 special pin connectors Typical sleep current 9μA at 3V, radio active ~20mA 12
TelosB Ø Six major I/O devices Ø Possible Concurrency q I 2 C, SPI, ADC Ø Energy Management q Turn peripherals on only when needed q Turn off otherwise 13
Hardware Constraints Severe constraints on power, size, and cost à Ø slow microprocessor Ø low-bandwidth radio Ø limited memory Ø limited hardware parallelism à CPU hit by many interrupts! Ø manage sleep modes in hardware components Chenyang Lu 14
Software Challenges Ø Small memory footprint Ø Efficiency - power and processing Ø Concurrency-intensive operations Ø Diversity in applications & platform à efficient modularity q Support reconfigurable hardware and software Chenyang Lu 15
OS: Basic Functions Ø OS controls resources: q who gets the CPU; q when I/O takes place; q how much memory is allocated; q power management Ø Application programs run on top of OS services Ø Challenge: manage multiple, concurrent tasks. Chenyang Lu 16
Example: Engine Control Concurrent tasks Ø spark control Ø crankshaft sensing Ø fuel/air mixture Ø oxygen sensor engine controller Chenyang Lu 17
Process Ø A process is a unique execution of a program. q Several copies of a program may run simultaneously. Ø A process has its own context. q Data in registers, Program Counter (PC), status. q Stored in Process Control Block (PCB) Ø Thread: lightweight process q Threads share memory space in a same process. Ø OS manages processes and threads. Chenyang Lu 18
Traditional OS Ø Multi-threaded Ø Preemptive scheduling Ø Threads: q ready to run; q executing on the CPU; executing q waiting for data. gets CPU preempted needs data gets data ready waiting needs data Chenyang Lu 19
Preemptive Priority Scheduling Ø Each process has a fixed priority (1 highest); Ø P 1 : priority 1; P 2 : priority 2; P 3 : priority 3. P 3 released P 1 released P 2 released P2 P1 P2 P3 30 60 0 10 20 40 50 time Chenyang Lu 20
Context Switch process 1 PC registers process 2 CPU ... memory Chenyang Lu 21
Limitations of Traditional OS Ø Multi-threaded + preemptive scheduling q Preempted threads waste memory q Context switch overhead Ø I/O q Blocking I/O: waste memory on blocked threads q Polling (busy-wait): waste CPU cycles and power Chenyang Lu 22
Existing Embedded OS Name Code Size Target CPU pOSEK 2K Microcontrollers pSOSystem PII->ARM Thumb VxWorks 286K Pentium -> Strong ARM QNX Nutrino >100K Pentium II -> NEC QNX RealTime 100K Pentium II -> SH4 OS-9 Pentium -> SH4 Chorus OS 10K Pentium -> Strong ARM ARIEL 19K SH2, ARM Thumb Creem 560 bytes ATMEL 8051 Ø QNX context switch = 2400 cycles on x86 Ø pOSEK context switch > 40 µs Ø Creem -> no preemption System architecture directions for network sensors, J. Hill, R. Szewczyk, A. Woo, S. Hollar, D. Culler, K. Pister. ASPLOS 2000. Chenyang Lu 23
TinyOS Solutions Ø Efficient modularity q Application = scheduler + graph of components q Compiled into one executable q Only needed components are complied/loaded Ø Concurrency: event-driven architecture Main (includes Ma s Scheduler) r) Ap Applic icatio ion n (User Compone nent nts) Ac Actuating ing Se Sensing Co Commun mmunicati tion Commun Co mmunicati tion Ha Hardware Abstractions Modified from D. Culler et al., TinyOS boot camp presentation, Feb 2001 Chenyang Lu 24
Example: Surge SurgeC StdControl SurgeP BootC StdControl ADC Timer SendMsg Leds StdControl ADC StdControl Timer StdControl SendMsg Leds PhotoC TimerC MultihopC LedsC Chenyang Lu 25
Example: Mica2 Mote Ø Microcontroller: 7.4 MHz, 8 bit Ø Memory: 4KB data, 128 KB program Ø Radio: max 38.4 Kbps Ø Sensors: Light, temperature, acceleration, acoustic, magnetic… Ø Power q <1 week on two AA batteries in active mode q >1 year battery life on sleep modes! Chenyang Lu 26
Example: Application D. Culler et. Al., TinyOS boot camp presentation, Feb 2001 application sensing application Routing Layer routing messaging Messaging Layer Radio Packet packet Radio Byte (MAC) Temp byte photo SW HW RFM ADC i2c bit clocks Chenyang Lu 27
Two-level Scheduling Ø Events handle interrupts q Interrupts trigger lowest level events q Events can signal events, call commands, or post tasks Ø Tasks perform deferred computations Ø Interrupts preempt tasks and interrupts Tasks Preempt POST FIFO events commands commands Interrupts Time Hardware Chenyang Lu 28
Multiple Data Flows Ø Respond quickly: sequence of events/commands through the component graph. q Immediate execution of function calls q e.g., get bit out of radio before it gets lost. Ø Post tasks for deferred computations. q e.g., encoding. Ø Events preempt tasks to handle new interrupts. Chenyang Lu 29
Sending a Message Timing diagram of event propagation (step 0-6 takes about 95 microseconds total) Chenyang Lu 30
Scheduling Ø Interrupts preempt tasks q Respond quickly q Event/command implemented as function calls Ø Task cannot preempt tasks q Reduce context switch à efficiency q Single stack à low memory footprint q TinyOS 2 supports pluggable task scheduler (default: FIFO). Ø Scheduler puts processor to sleep when q no event/command is running q task queue is empty Chenyang Lu 31
Space Breakdown… Code size for ad hoc networking application 3500 Interrupts Message Dispatch 3000 Initilization C-Runtime Scheduler: 144 Bytes code 2500 Light Sensor Totals: 3430 Bytes code Clock 2000 226 Bytes data Bytes Scheduler Led Control 1500 Messaging Layer Packet Layer 1000 Radio Interface Routing Application 500 Radio Byte Encoder 0 D. Culler et. Al., TinyOS boot camp presentation, Feb 2001 Chenyang Lu 32
Power Breakdown… Active Idle Sleep 5 μ A CPU 5 mA 2 mA 5 μ A Radio 7 mA (TX) 4.5 mA (RX) EE-Prom 3 mA 0 0 Panasonic LED’s 4 mA 0 0 CR2354 560 mAh 200 μ A Photo Diode 0 0 200 μ A Temperature 0 0 q Lithium battery runs for 35 hours at peak load and years at minimum load! • That’s three orders of magnitude difference! q A one byte transmission uses the same energy as approximately 11000 cycles of computation. Chenyang Lu 33
Time Breakdown… Packet reception Components work breakdown CPU Utilization Energy (nj/Bit) 0.05% 0.20% 0.33 AM 1.12% 0.51% 7.58 Packet 26.87% 12.16% 182.38 Radio handler 5.48% 2.48% 37.2 Radio decode thread 66.48% 30.08% 451.17 RFM - - 1350 Radio Reception Idle - 54.75% - Total 100.00% 100.00% 2028.66 Ø 50 cycle task overhead (6 byte copies) Ø 10 cycle event overhead (1.25 byte copies) Chenyang Lu 34
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