DCIS’04 Intro WA modelling RTZ study Conclusions 1 Implementation of an RTZ code Implementation of an RTZ code for feedback DAC on a for feedback DAC on a Sigma-Delta modulator Sigma-Delta modulator Jofre Pallarès 1 , Xavier Redondo 1 , Francesc Serra-Graells 1 , Justo Sabadell 2 jofre.pallares@cnm.es, xavier.redondo@cnm.es, paco.serra@cnm.es and justo.sabadell@cnm.es 1 Institut de Microelectrònica de Barcelona-CNM, Spain 2 Barcelona Branch Office, Epson Europe Electronics, GmbH Jofre Pallarès Cuxart Institut de Microelectrònica de Barcelona
DCIS’04 Implementation of an RTZ code for Intro WA modelling RTZ study Conclusions 2 feedback DAC on a Σ∆ modulator 1 Introduction 1 2 Waveform Assymetry Modelling 2 3 RTZ code consequences 3 4 Conclusions 4 Jofre Pallarès Cuxart Institut de Microelectrònica de Barcelona
DCIS’04 Implementation of an RTZ code for Intro WA modelling RTZ study Conclusions 3 feedback DAC on a Σ∆ modulator 1 Introduction 1 2 Waveform Assymetry Modelling 2 3 RTZ code consequences 3 4 Conclusions 4 Jofre Pallarès Cuxart Institut de Microelectrònica de Barcelona
DCIS’04 Implementation of an RTZ code for Intro WA modelling RTZ study Conclusions 4 feedback DAC on a Σ∆ modulator Σ∆ modulator architecture � Continuous-time � Single-loop � 1-bit quantizer � Log-domain Jofre Pallarès Cuxart Institut de Microelectrònica de Barcelona
DCIS’04 Implementation of an RTZ code for Intro WA modelling RTZ study Conclusions 5 feedback DAC on a Σ∆ modulator CMOS Log-Domain Simulation Issues � Very low-voltage � High-accuracy � Low-power � Continuous-time � MOS-only � Oversampling � EKV equations � Pseudo-periodic . . . need for high-level analytical modeling! Jofre Pallarès Cuxart Institut de Microelectrònica de Barcelona
DCIS’04 Implementation of an RTZ code for Intro WA modelling RTZ study Conclusions 6 feedback DAC on a Σ∆ modulator 1 Introduction 1 2 Waveform Assymetry Modelling 2 3 RTZ code consequences 3 4 Conclusions 4 Jofre Pallarès Cuxart Institut de Microelectrònica de Barcelona
DCIS’04 Implementation of an RTZ code for Intro WA modelling RTZ study Conclusions 7 feedback DAC on a Σ∆ modulator Waveform Asymmetry � Waveform asymmetry is enlarged due to log domain operation � Integration error exhibits code dependency � Error power spectral density is plain inside signal band � Error differences must be below 0.5% to achieve 12 bits! . . . need for another feedback code! → RTZ coding Jofre Pallarès Cuxart Institut de Microelectrònica de Barcelona
DCIS’04 Implementation of an RTZ code for Intro WA modelling RTZ study Conclusions 8 feedback DAC on a Σ∆ modulator � Actual Wave � Extracted Error � Error Decomposition Jofre Pallarès Cuxart Institut de Microelectrònica de Barcelona
DCIS’04 Implementation of an RTZ code for Intro WA modelling RTZ study Conclusions 9 feedback DAC on a Σ∆ modulator Easy parameter extraction + A A = − = 1 1 0 G P � Based on bit-area differences 2 A � Extracted from short transient − A A = 1 0 N electrical simulations C 2 T Jofre Pallarès Cuxart Institut de Microelectrònica de Barcelona
DCIS’04 Implementation of an RTZ code for Intro WA modelling RTZ study Conclusions 10 feedback DAC on a Σ∆ modulator 1 Introduction 1 2 Waveform Assymetry Modelling 2 3 RTZ code consequences 3 4 Conclusions 4 Jofre Pallarès Cuxart Institut de Microelectrònica de Barcelona
DCIS’04 Implementation of an RTZ code for Intro WA modelling RTZ study Conclusions 11 feedback DAC on a Σ∆ modulator Changes in transfer functions = ⋅ + ⋅ + ⋅ ( ) ( ) ( ) Y s STF X s NTF E s CTF N c � A G reduction on feedback, can be viewed as a 1/ G amplification on signal − 1 1 ≈ ≈ STF CTF G G � NTF doesn’t changes inside signal band (Quantization error E(s) is reduced by G ) 4 s = NTF 4 + 3 + 2 + + s GDs GCDs GBCDs GABCD Jofre Pallarès Cuxart Institut de Microelectrònica de Barcelona
DCIS’04 Implementation of an RTZ code for Intro WA modelling RTZ study Conclusions 12 feedback DAC on a Σ∆ modulator Changes in overall performance � Imax reduction ′ + I N ′ = ⇒ = − max c I I G I N max max max c G � DR displacement � If quantization error is the main source of noise, a decrase on RTZ cycle produces a DR left-shift. � A dynamically changed RTZ duty cycle allows us to work on best SNR point and expands DR. Jofre Pallarès Cuxart Institut de Microelectrònica de Barcelona
DCIS’04 Implementation of an RTZ code for Intro WA modelling RTZ study Conclusions 13 feedback DAC on a Σ∆ modulator 1 Introduction 1 2 Waveform Assymetry Modelling 2 3 RTZ code consequences 3 4 Conclusions 4 Jofre Pallarès Cuxart Institut de Microelectrònica de Barcelona
DCIS’04 Implementation of an RTZ code for Intro WA modelling RTZ study Conclusions 14 feedback DAC on a Σ∆ modulator High-level simulations � G+ N c model matches RTZ simulation � Simulation speed improvement > 10 times RTZ wave G+ N c model 400 sec 30 sec Jofre Pallarès Cuxart Institut de Microelectrònica de Barcelona
DCIS’04 Implementation of an RTZ code for Intro WA modelling RTZ study Conclusions 15 feedback DAC on a Σ∆ modulator Electrical vs. High-level simulations � Electrical simulation allways needed for model validation � Differences on noise floor due to ... numerical convergence , non-modeled effects Simulink Spectre 30 sec 75 hours Jofre Pallarès Cuxart Institut de Microelectrònica de Barcelona
DCIS’04 Implementation of an RTZ code for Intro WA modelling RTZ study Conclusions 16 feedback DAC on a Σ∆ modulator Conclusions � Simple, fast and easy to calculate high-level model for feedback DAC on continuous-time modulators Σ∆ presented � Simulation speed improved around 10~ 10000 times � Modulator complete performance estimations can be iterated � RTZ duty cycle can be dynamically adjusted to work on optimal operation conditions Jofre Pallarès Cuxart Institut de Microelectrònica de Barcelona
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