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High-Frequency FOREX Trading: Identification of Triangular Arbitrage - PowerPoint PPT Presentation

High-Frequency FOREX Trading: Identification of Triangular Arbitrage Opportunities Graham Gobieski, Kevin Kwan, Ziyi Zhu, Shang Liu Demos Demo 2 Demo 1 1 0 5 4 6 4 -13 0 1 -9 -9 1 1 4 1 1 2 3 2 2 3 -7 Destination 3 2 3


  1. High-Frequency FOREX Trading: Identification of Triangular Arbitrage Opportunities Graham Gobieski, Kevin Kwan, Ziyi Zhu, Shang Liu

  2. Demos Demo 2 Demo 1 1 0 5 4 6 4 -13 0 1 -9 -9 1 1 4 1 1 2 3 2 2 3 -7 Destination 3 2 3 0 1 2 3 4 5 6 Destination 0 0 1 0 0 0 0 0 0 1 2 3 4 1 0 0 2 0 0 -9 0 0 0 4 0 0 0 Source 2 0 0 0 2 0 0 0 1 0 0 3 0 0 Source 3 0 0 0 0 1 0 0 2 0 0 0 4 0 4 0 0 -13 0 0 0 0 3 0 0 0 0 -7 5 0 0 0 0 0 0 1 6 0 1 0 0 0 0 0 4 0 -9 0 0 0

  3. Demo 3: Live Cycles

  4. Motivation • High-Frequency Trading: taking advantage of opportunities USD 0.978 (inefficiencies, etc.) on very short timescales EUR 1.02 • Triangular Arbitrage: due to market 1.06 inefficiencies, exchanging a currency AUD between three or more currencies and arriving back at the original currency might be profitable 1.02 x 1.06 x .978 > 1 • Timescale: ~5-20ms, data streams over network

  5. Bellman-Ford for each vertex x in V do Transformation if x is source then 1. w1 * w2 * w3 * … * wn > 1 w(x) = 0 2. log(w1) + log(w2) + log(w3) + … + log(wn)< 0 else w(x) = INFINITY 3. -(log(w1) + log(w2) + log(w3) + … + log(wn))< 0 p(x) = NULL end if end for for i = 1 to v - 1 do for each edge(i, j) in E do if w(i) + w(i, j) < w(j) then //Relaxation w(j) = w(i) + w(i, j) p(j) = i end if end for end for for each edge(i, j) in E do if w(j) > w(i) + w(i, j) then //Found Negative-Weight Cycle end if end for

  6. Hardware Design FOREX Container Bellman-Ford 5 1 2b 2c 2a Frame Update Adjacency Setup: Relax: Matrix Read: Src: 0 w(src) + w(e) < Src and Dst 2 Other: Inf w(dst) Container Bellman-Ford VE Times Cycle Detect O(V) Times 3 3b 3a 3c Storage: SRAM Test: Cycle Read: Read Cycle: Vert List w(src) + w(e) < pred(dst) Detection Vertex 33 Nodes w(dst) 4 Adjacency V Times 33 Nodes Matrix Print-Cycle O(V) Times Print Cycle 33 Nodes 4b 4a 4c Read: Test: Print: Vertex High bit is 1 frame_we <= 1 Program Flow 5 V Times

  7. Overview Bellman Print Cycle

  8. Software Design, VGA Python Front-End Kernel Module Option 1 1. Load Data 1. Setup Memory- 2. Preprocess Data mapped I/O Amba Bus 3. Write Data via 2. Write Data to custom Ioctl call Bus Hardware C Front-End Kernel Module 2 1. Load Data Option 2 1. Setup Memory- 2. Preprocess Data mapped I/O 3. Write Data via 2. Amba Bus Write Key Data custom Ioctl call to Bus 4. Write keyboard events

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