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Design and Manufacturing of a Double-Side Cooled, SiC based, High - PowerPoint PPT Presentation

Design and Manufacturing of a Double-Side Cooled, SiC based, High Temperature Inverter Leg Raphal R IVA 1 , Cyril B UTTAY 1 , Marie-Laure L OCATELLI 2 , Vincent B LEY 2 , Bruno A LLARD 1 1 Laboratoire Ampre, Lyon, France 2 Laboratoire LAPLACE,


  1. Design and Manufacturing of a Double-Side Cooled, SiC based, High Temperature Inverter Leg Raphaël R IVA 1 , Cyril B UTTAY 1 , Marie-Laure L OCATELLI 2 , Vincent B LEY 2 , Bruno A LLARD 1 1 Laboratoire Ampère, Lyon, France 2 Laboratoire LAPLACE, Toulouse, France 15/5/14 1 / 28

  2. Outline Introduction The 3-D structure Silver migration Module Manufacturing Conclusion 2 / 28

  3. Outline Introduction The 3-D structure Silver migration Module Manufacturing Conclusion 3 / 28

  4. Active Power Devices for High Temperature Falahi et Al. “High temperature, Smart Power Module for aircraft actuators”, HiTEN 2013 250 -50 ◦ C -10 ◦ C 27 ◦ C 70 ◦ C 107 ◦ C 70 310°C 200 60 160 ◦ C 150 50 Drain current [A] 196 ◦ C V out [V] 40 234 ◦ C 100 270 ◦ C 30 50 20 0 10 50 0 49.0 48.8 48.6 48.4 0.2 0.0 0.2 0 2 4 6 8 10 12 time [ µ s] time [ µ s] Drain-to-Source voltage [V] Previous results show that SiC JFETs are attractive for > 200 ° C operation: ◮ rated at 1200 V (or more), several Amps ◮ Voltage-controlled devices ◮ No reliability issue related to gate oxide degradation 4 / 28

  5. High Temperature Thermal Management Buttay et al. “Thermal Stability of Silicon Carbide Power JFETs”, IEEE Trans on Electron Devices, 2014 80 70 SiC JFET: Run-away 60 ◮ 490 m Ω , 1200 V power [W] ◮ R Th JA = 4 . 5 K / W 50 ◮ 135 ° C ambient ◮ On-state losses 40 current changed from 3.65 to 3.7 A 30 100 150 200 250 300 350 time [s] High temperature capability � = reduced cooling needs! SiC JFETs must be attached to a low- R Th cooling system. 5 / 28

  6. Double Side Cooling ◮ Standard packaging offers cooling through one side of the die only ◮ “3-D” or “Sandwich” package performs thermal management on both sides ◮ Requires suitable topside metal on the die ◮ Requires special features for topside contact 6 / 28

  7. Double Side Cooling ◮ Standard packaging offers cooling through one side of the die only ◮ “3-D” or “Sandwich” package performs thermal management on both sides ◮ Requires suitable topside metal on the die ◮ Requires special features for topside contact 6 / 28

  8. Outline Introduction The 3-D structure Silver migration Module Manufacturing Conclusion 7 / 28

  9. The proposed 3-D Structure V bus J H OUT J L GND ◮ Two ceramic substrates, in “sandwich” configuration ◮ Two SiC JFET dies (SiCED) ◮ assembled using silver sintering ◮ 25.4 mm × 12.7 mm (1 in × 0.5 in) 8 / 28

  10. Ceramic Substrates Copper Alumina ◮ Si 3 N 4 identified previously for 0.16 mm high temperature 0.15 mm 0,15 mm Source Gate Source 0,3 mm ◮ For development: use of 0.2 mm alumina SiC JFET ◮ Etching accuracy exceeds 0.3 mm Drain standard design rules ◮ Double-step copper etching for die contact ➜ Custom etching technique Scale drawing for 2.4 × 2.4 mm 2 die 9 / 28

  11. Bonding Material: Silver Sintering Silver Paste ◮ Based on micro-scale silver particles (Heraeus LTS-117O2P2) ◮ Low temperature (240 ° C) sintering Göbl, C. et al “Low temperature sinter technology Die attachment for automotive ◮ Low pressure (2 MPa) process power electronic applications” proc of APE, 2006 No liquid phase involved: ◮ No movement of the die ◮ No bridging across terminals ◮ No height compensation thanks to wetting 10 / 28

  12. 3-D Structure: Challenges ◮ Behaviour of silver at high temperature (risks of migration) ◮ Behaviour of silver paste during assembly (bridging, compensation of height differences) ◮ High-resolution alignment of parts ◮ Etching resolution of the DBC substrates 11 / 28

  13. 3-D Structure: Challenges ◮ Behaviour of silver at high temperature (risks of migration) ◮ Behaviour of silver paste during assembly (bridging, compensation of height differences) ◮ High-resolution alignment of parts ◮ Etching resolution of the DBC substrates 11 / 28

  14. 3-D Structure: Challenges ◮ Behaviour of silver at high temperature (risks of migration) ◮ Behaviour of silver paste during assembly (bridging, compensation of height differences) ◮ High-resolution alignment of parts ◮ Etching resolution of the DBC substrates 11 / 28

  15. 3-D Structure: Challenges ◮ Behaviour of silver at high temperature (risks of migration) ◮ Behaviour of silver paste during assembly (bridging, compensation of height differences) ◮ High-resolution alignment of parts ◮ Etching resolution of the DBC substrates 11 / 28

  16. Outline Introduction The 3-D structure Silver migration Module Manufacturing Conclusion 12 / 28

  17. Causes of Silver Migration Silver atoms can migrate due to simultaneous presence of: ◮ High Temperature ◮ Oxygen/moisture ◮ Electric field Source: Yang S et al. Initial stage of silver electrochemical migration degradation. Microelectron Reliab 2006;46(9):1915–21. Silver will then form filaments across the potential differences, causing short circuits! 13 / 28

  18. Characterization Test Bench ◮ Up to 10 samples biased and monitored simultaneously ◮ 1100 V max biasing, < 10 nA accuracy ◮ Tests performed at 300 ° C 14 / 28

  19. Test Vehicles ◮ Silver paste stencil-printed on alumina, and sintered ◮ Various gaps investigated: 0.5, 1, 1.5, 2 mm ◮ Test of vehicles: ◮ Un-protected ◮ Protected with a 20 µ m layer of parylene HT ◮ 5 samples for each configuration 15 / 28

  20. Results – Un-coated samples 1E-4 1E-5 Current (A) 1E-6 1E-7 1E-8 0 50 100 150 200 250 Time (h) ◮ Leakage current remains negligible until short circuit ◮ Large differences between similar test vehicles: ◮ shape of the silver migration ◮ time before failure 16 / 28

  21. Results – 2 T = 300°C 1E-2 -1 ) 1/t (h Stop parameter 1E-3 Without parylene Parylene SCS HT 500 1000 1500 2000 2500 3000 3500 4000 4500 5000 Electric Field (V/mm) ◮ time before failure short without encapsulation (100–1000 h) ◮ Strong increase with parylene HT protection ◮ Tests stopped after 1000 h if no migration occured 17 / 28

  22. Conclusions on High Temperature Operation of Silver-Sintered Joints ◮ Silver migration is an issue ◮ It should be evaluated on a more representative test vehicle (silver used for die attach only) ◮ Parylene HT is a good way to slow down migration ➜ Parylene HT will be used in the 3-D structure. 18 / 28

  23. Conclusions on High Temperature Operation of Silver-Sintered Joints ◮ Silver migration is an issue ◮ It should be evaluated on a more representative test vehicle (silver used for die attach only) ◮ Parylene HT is a good way to slow down migration ➜ Parylene HT will be used in the 3-D structure. 18 / 28

  24. Conclusions on High Temperature Operation of Silver-Sintered Joints ◮ Silver migration is an issue ◮ It should be evaluated on a more representative test vehicle (silver used for die attach only) ◮ Parylene HT is a good way to slow down migration ➜ Parylene HT will be used in the 3-D structure. 18 / 28

  25. Conclusions on High Temperature Operation of Silver-Sintered Joints ◮ Silver migration is an issue ◮ It should be evaluated on a more representative test vehicle (silver used for die attach only) ◮ Parylene HT is a good way to slow down migration ➜ Parylene HT will be used in the 3-D structure. 18 / 28

  26. Outline Introduction The 3-D structure Silver migration Module Manufacturing Conclusion 19 / 28

  27. Preparation of the Substrates plain DBC board ◮ Final patterns within 50 µ m of desired size ◮ Two designs, for 2.4 × 2.4 mm 2 and 4 × 4 mm 2 dies ◮ Total copper thickness 300 µ m, ≈ 150 µ m per step 20 / 28

  28. Preparation of the Substrates plain DBC board 1a - Photosensitive resin coating ◮ Final patterns within 50 µ m of desired size ◮ Two designs, for 2.4 × 2.4 mm 2 and 4 × 4 mm 2 dies ◮ Total copper thickness 300 µ m, ≈ 150 µ m per step 20 / 28

  29. Preparation of the Substrates plain DBC board 1a - Photosensitive resin 1b - Exposure and coating Development ◮ Final patterns within 50 µ m of desired size ◮ Two designs, for 2.4 × 2.4 mm 2 and 4 × 4 mm 2 dies ◮ Total copper thickness 300 µ m, ≈ 150 µ m per step 20 / 28

  30. Preparation of the Substrates plain DBC board 1a - Photosensitive resin 1b - Exposure and 2 - Etching coating Development ◮ Final patterns within 50 µ m of desired size ◮ Two designs, for 2.4 × 2.4 mm 2 and 4 × 4 mm 2 dies ◮ Total copper thickness 300 µ m, ≈ 150 µ m per step 20 / 28

  31. Preparation of the Substrates plain DBC board 1a - Photosensitive resin 1b - Exposure and 2 - Etching 3a - resin coating coating Development ◮ Final patterns within 50 µ m of desired size ◮ Two designs, for 2.4 × 2.4 mm 2 and 4 × 4 mm 2 dies ◮ Total copper thickness 300 µ m, ≈ 150 µ m per step 20 / 28

  32. Preparation of the Substrates plain DBC board 1a - Photosensitive resin 1b - Exposure and 2 - Etching 3a - resin coating coating Development 3b - Exposure and Developpment ◮ Final patterns within 50 µ m of desired size ◮ Two designs, for 2.4 × 2.4 mm 2 and 4 × 4 mm 2 dies ◮ Total copper thickness 300 µ m, ≈ 150 µ m per step 20 / 28

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