DDQA Workshop Housekeeping Items • All conversations must remain at Distribution A level (No classified, FOUO, CUI, etc. ) Attendee microphones are muted and videos are turned off. • • If you have a question for the presenter or panel, please submit through the Q&A button. • Questions will be answered at the end of the panel member talks • If you dial in separately using your phone, link the phone connection with your assigned Zoom participant id • The participant id is 6 numbers seen by clicking on the in the upper left of the zoom screen • On your phone press #, enter the participant id, # • If you have any logistical or connection issues: Connect with Zoom support: • • Zoom Troubleshooting Guidance: https://support.zoom.us/hc/en- us/sections/200305593-Troubleshooting • Wireless Connection Issues: https://support.zoom.us/hc/en- us/articles/201362463-Wireless-WiFi-Connection-Issues Connect with the ERI Team desk via the 6Connex platform • UNCLASSIFIED Distribution Statement A: Approved for public release; DOPSR Case # 20-S-1917 applies. Distribution is unlimited
DDQA Agenda Late Afternoon Break: 15:55pm-16:05pm 1605-1615 Introduction Brian Dupaix, Air Force Research Laboratory, Project Lead and Moderator 1615-1645 Data Driven Quantifiable Assurance Panel Brian Dupaix, Air Force Research Laboratory, Design Assurance, Risk Assessment and Metrics G. Dave Via, Air Force Research Laboratory, Quantifiably Assured Manufacturing Glenn Berger, NSWC Crane, Verification and Validation Jeff Krieg, NSA, Field Programmable Gate Array Assurance 1645-1745 Questions and Answers UNCLASSIFIED Distribution Statement A: Approved for public release; DOPSR Case # 20-S-1917 applies. Distribution is unlimited
Trusted and Assured Microelectronics Program Data Driven Quantifiable Assurance Aug 2020 https://www.CTO.mil @DoDCTO UNCLASSIFIED Distribution Statement A: Approved for public release; DOPSR Case # 20-S-1917 applies. Distribution is unlimited Distribution Statement A: Approved for public release; DOPSR Case # 20-S-1917 applies. Distribution is unlimited
Assured Microelectronics Evolution ASIC Design Today ASIC Design Design MFG. 5nm MINSEC Design MFG. T&AM 7nm ASIC 14nm Design ~40x 22nm Performance Capability 45nm 10 yrs. DoD TAPO Design MFG. 90nm ASIC 130nm DoD Design 20 yrs. 250nm SEMATECH Strategic Rad-Hard 500nm Design MFG. MIMIC Industry System On Chip (SOC) MINSEC – Microelectronics Innovation for National Security and Economic Competitiveness VHSIC T&AM – Trusted & Assured Microelectronics TAPO – Trusted Access Program Office SEMATECH – Semiconductor Manufacturing Technology MIMIC – Microwave/Millimeter Monolithic Integrated Circuits VHSIC - Very High Speed Integrated Circuits 1980 1982 1984 1986 1988 1990 1992 1994 1996 1998 2000 2002 2004 2006 2008 2010 2012 2014 2016 2018 2020 2022 T&AM/MINSEC Program is developing the secure ecosystem to assure SOTA performance for Modernization UNCLASSIFIED Distribution Statement A: Approved for public release; DOPSR Case # 20-S-1917 applies. Distribution is unlimited
Trusted and Assured Microelectronics Strategic Approach Microele Mic lectronics - DoD’s T s Top M Modern rnizati tion Priori rity ty We cannot expect success fighting tomorrow’s conflicts with yesterday’s weapons or equipment. -National Defense Strategy Access to State of the Art Data Driven Address DoD Unique Create a Resilient and Commercial Technology Needs Robust Pipeline Quantifiable Assurance Threats to design and Domestic and Allied Ecosystem DoD lags commercial CMOS Increased sources for manufacturing in global Gaps: to rapidly and securely mature ecosystem/ infrastructure national strategic defense emerging advanced technology supply chain Establish best practices for Develop sustainable sources Invigorate secure pipeline for Secure full lifecycle secure design, assembly, of mission essential niche rad- disruptive R&D transition, confidentiality, Integrity, Approach: packaging, and test hard electronics capabilities, supply chain aware verification & validation, capabilities to support DIB and specialized radio technology development, and supply chain for assured and co-development of dual frequency and electro-optic education and workforce. use electronics warfighters electronics components UNCLASSIFIED Distribution Statement A: Approved for public release; DOPSR Case # 20-S-1917 applies. Distribution is unlimited
Lifecycle Microelectronics Threats Supply Physical Chain Trust analysis Assurance Functional Processor/ System-on-chip security verification IP attack surfaces Bugs Errant behavior 2+2 = 5 Malicious Malware modifications Formal SW Equivalence dev/debug Side channels Insecure components Counterfeits/ clones Security Data leaks Formal design Proof services Provenance Design IP tracking “Data collection and analysis methods must be developed and applied along the entire lifecycle, in a manner that does not introduce significant throughput impact or prohibitive cost penalties, in order to effectively counter security threats that include malicious insertion, fraudulent products, theft of IP, and quality and reliability failures.” – Dr. Lisa Porter, DUSD R&E, ERI Summit 2019 Program* Config./ Integrate Pack. Verify & PPP*/ Operation Development & Design Verify Mask Fabrication prog. & test & test validate CPI & maint. Capabilities SW UNCLASSIFIED Distribution Statement A: Approved for public release; DOPSR Case # 20-S-1917 applies. Distribution is unlimited
Data Driven Quantifiable Assurance Lifecycle assurance tools & techniques quantified & qualified for military use to develop & demonstrate "Zero-trust” Architecture with Quantifiable Assurance and security standards! 011010101001010101110 101001010101010100100 010101001100101010010 101001010101001010101 001010101010010101000 101110010101001010101 010101010001010101010 Risk Assessment Verification and Quantifiably Assured Design Assurance FPGA Assurance JFAC* and Metrics Manufacturing Validation • Design with Confidentiality • Data Automation & • Fab Data Product capture • Design Verification • FPGA Assurance Standards • Federated capability to and Integrity Collection support Programs in HW • Post Silicon Inspection and • Physical Verification • Detection and Prevention and SW assurance • IP Protection and • Mathematical Models Verification Capability • Functional Verification evaluation • Core Laboratories and • Integration in Practice • IC Personalization • Response/Analysis Service Providers • Quantified Assurance Capability • PPP Guidance and Support Program* Config./ Pack. Verify & Integrate PPP*/ Operation Development & Fabrication Design Verify Mask prog. & test validate & test CPI & maint. Capabilities SW UNCLASSIFIED Distribution Statement A: Approved for public release; DOPSR Case # 20-S-1917 applies. Distribution is unlimited
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