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Overview CSE 120 Hardware How hardware works Operating Systems Layer What the kernel does API What the programmer does July 27, 2006 Day 8 Input/Output Instructor: Neil Rhodes 2 Hardware Hardware Kinds Bus : a set of wires


  1. Overview CSE 120 Hardware � How hardware works Operating Systems Layer � What the kernel does API � What the programmer does July 27, 2006 Day 8 Input/Output Instructor: Neil Rhodes 2 Hardware Hardware Kinds Bus : a set of wires and protocol for communicating � Block devices: read/write a block independent of all others � ISA � PCI – Disk drive � Memory bus – Floppy drive – USB pendrive Daisy chain : bus with cables going from one device to the next � Character devices: read/write one or more bytes � USB – Keyboard � SCSI – Mouse Level 2 � Firewire Main Memory PCI Bridge CPU – Serial Cache – Network PCI Bus – Printer � Miscellaneous Graphics IDE Disk USB SCSI – Memory-mapped video Controller Controller – Video chips – Clock Monitor Universal Serial Bus (USB) Disk Disk Disk SCSI Bus Keyboard Disk Disk Disk Mouse 3 4

  2. Hardware Controllers Communicating with a Hardware Controller Simple Polling write ( busy-wait) : � Serial controller CPU: – has buffer of several bytes • � loop while busy bit in status Complex register is set � SCSI controller • � Set write bit in control register. – reads data from drive serially into block of memory inside controller • � Write data byte into data-out – Returns that block of data once block is completely read register Controller: Communication between CPU and controller • � Set command-ready bit in � Registers •loop while command-ready bit in control register – Data in control register is not set •loop while busy bit in – Data out •Set busy bit in status register – Status status register is set •Since write bit in control register – Control � How to access register? is set, read data-out register – Memory-mapped I/O - Registers are in a portion of memory space. Device controller looks for memory accesses in do I/O its own area of space. – Using I/O ports Clear command-ready bit in control - Separate instructions for reading and writing port address space. (Separate bit on the bus register specifies I/O space rather than memory space). Clear error bit in status register Clear busy bit in status register Check error 5 6 Communicating with a Hardware Controller Interrupts Interrupt-driven I/O Interrupt Levels � Specifies priority of an interrupt; higher-level interrupts are serviced before CPU: lower-level ones • � loop while busy bit in status � Non-Maskable Interrupt (NMI) register is set – One that the processor can’t ignore. Debugging button, for example • � Set write bit in control register. Interrupt Controller will: • � Write data byte into data-out � Be notified by hardware controller that it wishes to interrupt register Controller: � Check to see whether there’s an already-pending interrupt of same or higher • � Set command-ready bit in control •loop while command-ready bit in control priority � If not, put interrupt address (small number) on bus, and generate interrupt register register is not set • Continue processing •Set busy bit in status register signal to CPU •Since write bit in control register is set, CPU will: � Check for interrupt signal after every instruction read data-out register � On interrupt (if not masked), save minimal state – Use interrupt vector (table at well-known location) to jump to interrupt service routine do I/O (ISR) – ISR will acknowledge the interrupt when it is ready to handle another interrupt Clear command-ready bit in control register – Handle condition that caused interrupt (wake sleeping process) Clear error bit in status register – Restore state Clear busy bit in status register Issue interrupt •Process interrupt 7 8

  3. Direct Memory Access (DMA) Layers of I/O Software Without DMA User Space Rest of the process � CPU must transfer information form device controller to main memory by U reading/writing data one byte/word at a time ( programmed I/O) User-level I/O software Idea: Have DMA controller that will do the transfer on behalf of the CPU � Sometimes build into device controller (must be a bus master) Device-Independent I/O Software � CPU programs the DMA controller to specify source, destination, and Kernel amount � DMA controller loops: Need picture IDE Driver Keyboard Driver – Seize memory bus ( cycle stealing) – Tell device controller to write to memory address – Release memory bus IDE ISR Keyboard ISR � When complete, issue interrupt to CPU Usually used for device generating lots of data bus � Disk, video Hardware � Not keyboard, for example IDE Controller USB Controller keyboard disk 9 10 Device Driver Functionality Uniformity Initialize Uniform interface between OS and drivers � Probe whether device is there � Unix character devices � Figure out interrupt address (usually known by device controller) – read � Allocate data structures – write Open – open � Install ISR – close � Enable interrupts on controller – ioctl � Unix block devices (buffered in kernel memory) Close – open � Disable interrupts on controller – close � Uninstall ISR – strategy Read - Given a buffer header with address, read/write bit, block number,word count, � Read data from device major/minor device number Write Uniform interface between user programs and devices � Write data to device � Unix, for example ioctl – inode specifics block vs. character and major/minor device numbers � Device-specific functionality - Major number used as index into table of drivers - Minor number used to specify which device – Set baud rate, for example – which partition on disk ISR – which serial port � Not called directly, but only in response to an interrupt – … 11 12

  4. Buffering Buffering and Performance Unbuffered Write a network packet � Driver reads directly into user space, one byte at a time � Assemble packet in user space � Write – read(fd, &ch, 1); � Disadvantage: must wake up user process on every byte – Copies to kernel buffer � Driver Buffered in user space � Driver reads directly into a buffer in user space – Copies to controller buffer � Controller – read(fd, buffer, sizeof(buffer)); � Disadvantage: must lock the page in memory – Moves onto network � On remote end: Buffered in kernel – Controller assembles into controller buffer � Driver reads into a buffer in the kernel � Driver � When buffer is full, copied to user space – Copies from controller buffer to kernel buffer � Disadvantage: copying takes time. Buffer may overflow � Read Double-buffering in kernel – Copies from kernel buffer to user space � Driver reads into a buffer in the kernel � When buffer is full, copied to user space � While copying (or waiting for user space page to be paged in), use separate buffer for incoming data � Disadvantage: more memory used in the kernel 13 14 User-space I/O software Disks Buffering in user-space Hardware � All FILE* routines: fputc, putchar, getchar Track Formatting routines: � sprintf, printf, etc. Head Library interfaces to system calls Disk � write Head Assembly – Small assembly-language stub that marshals parameters and issues Platter system call Sector � read � etc. Spooling Time to access a block (sector) � printing a file � Seek time (time to move the head in or out to the appropriate track) � Rotational latency (time for the disk to spin so that the beginning of � UUCP (Unix to Unix Copy) the sector is under the head) � Transfer time (time for the data to be read from the sector). 15 16

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