CPSC 121: Models of Computation Module 9: Sequential Circuits
Midterm 2 Information Midterm 2: Tuesday March 17 th , 17:00 to 18:15 A to K: WOOD 2 L to S: CIRS 1250 T to Z: ESB 1013 Modules 5 to 9 (up to the end of Friday's class) + Labs 4 to 7. Go to Resources → Practice Material for old quizzes and midterm exams. CPSC 121 – 2019W T2 2
Midterm 2 Information Midterm 2: You should bring Your UBC Card (we will be checking IDs) Your CS ID (we will upload the exams to Gradescope) A dark pen (exams too light to scan well make up grumpy) A ruler (to draw straight wires) Anything with electronics in it must remain in your bag. So no calculator, laptop, smart phone, smart watch, etc. CPSC 121 – 2019W T2 3
Module 9: Sequential Circuits By the start of class, you should be able to Trace the operation of a DFA (deterministic finite- state automaton) represented as a diagram on an input, and indicate whether the DFA accepts or rejects the input. Deduce the language accepted by a simple DFA after working through multiple example inputs. CPSC 121 – 2019W T2 4
Module 9: Sequential Circuits Quiz 9 feedback: Well done. Many fine answers to the push-button light question. We will revisit this problem soon. CPSC 121 – 2019W T2 5
Module 9: Sequential Circuits CPSC 121: the BIG questions: ? ? ? 1. How can we build a computer that is able to ? ? execute a user-defined program? a) Computers execute instructions one at a time. ? ? b) They need to remember values, unlike the circuits you ? ? designed in labs 1, 2, 3 and 4. ? c) That is, a computer is a very large and very complicated sequential circuit . ? ? ? ? ? ? ? CPSC 121 – 2019W T2 6
Module 9: Sequential Circuits By the end of this module, you should be able to: Translate a DFA into a sequential circuit that implements the DFA (lab 8). Explain how and why each part of the resulting circuit works. CPSC 121 – 2019W T2 7
Module 9: Sequential Circuits Announcements: Pre-class quiz #10 is due Sunday March 15 th at 19:00. Textbook sections: Epp, 4 th or 5 th edition: 5.1 to 5.4 Epp, 3 rd edition: 4.1 to 4.4 Rosen, 6 th edition: 4.1, 4.2 Rosen, 7 th edition: 5.1, 5.2 Assignment #4 is due Sunday at 19:00. CPSC 121 – 2019W T2 8
Module 9: Sequential Circuits Announcements (continued): Pre-class quiz #11 is tentatively due Sunday March 29 th at 19:00. Textbook sections: Epp, 4 th or 5 th edition: remainder of 6.1, 7.1 Epp, 3 rd edition: remainder of 5.1, 6.1 Rosen, 6 th edition: remainder of 2.1, 2.3 up to the top of page 136. Rosen, 7 th edition: remainder of 2.1, 2.3 down to the bottom of page 141. CPSC 121 – 2019W T2 9
Module 9: Sequential Circuits Module Summary Latches, toggles and flip-flops. Analyzing sequential circuits. Other problems and exercises. CPSC 121 – 2019W T2 10
Module 9.1: Latches, toggles and flip-flops A circuit that implements a finite state machine of either type needs to remember the current state: It needs memory. A latch A flip-flop A register (multiple side by side flip-flops with a common clock) b2 b3 b0 b1 CPSC 121 – 2019W T2 11
Module 9.1: Latches, toggles and flip-flops Recall the latch from lab #5: When en is low, the MUX retains its current value. When en is high, it changes its value to d instead. CPSC 121 – 2019W T2 12
Module 9.1: Latches, toggles and flip-flops Problem: Design a circuit that changes state every time a button is pushed. ? ? CPSC 121 – 2019W T2 13
Module 9.1: Latches, toggles and flip-flops What signal does the button generate? high low CPSC 121 – 2019W T2 14
Module 9.1: Latches, toggles and flip-flops Complete the circuit... Circuit to calculate the next state CPSC 121 – 2019W T2 15
Module 9.1: Latches, toggles and flip-flops What is wrong with our solution? a) We should have used XOR instead of NOT. b) The light will be in a random, unpredictable state. c) The delay introduced by the NOT gate is too long. d) There is some other problem with the circuit. e) Nothing is wrong. ▷ CPSC 121 – 2019W T2 16
Module 9.1: Latches, toggles and flip-flops This toll booth has a similar problem. From MIT 6.004, Fall 2002 CPSC 121 – 2019W T2 18
Module 9.1: Latches, toggles and flip-flops Instead use this: P.S. Call this a “bar”, not a “gate”, or we'll tie ourselves in (k)nots. From MIT 6.004, Fall 2002 CPSC 121 – 2019W T2 19
Module 9.1: Latches, toggles and flip-flops The circuit version of this improved tollbooth is called a flip-flop: CPSC 121 – 2019W T2 20
Module 9.1: Latches, toggles and flip-flops Assume the value stored in the flip-flop is 1 and d = 0. As long as the clock remains low: 1 0 0 0 1 CPSC 121 – 2019W T2 21
Module 9.1: Latches, toggles and flip-flops Observe that the two select input are never the same. 1 0 0 0 1 CPSC 121 – 2019W T2 22
Module 9.1: Latches, toggles and flip-flops Now the clock goes high: 0 0 0 1 1 0 CPSC 121 – 2019W T2 23
Module 9.1: Latches, toggles and flip-flops Now the clock goes low again: 0 0 0 1 0 1 CPSC 121 – 2019W T2 24
Module 9.1: Latches, toggles and flip-flops Finally we set d = 1: 0 1 1 1 0 1 CPSC 121 – 2019W T2 25
Module 9.1: Latches, toggles and flip-flops And we get the following improved circuit for our button and light problem: CPSC 121 – 2019W T2 26
Module 9: Sequential Circuits Module Summary Latches, toggles and flip-flops. Analyzing sequential circuits. Other problems and exercises. CPSC 121 – 2019W T2 27
Module 9.2: Analyzing sequential circuits How does a sequential circuit work? When the clock is low, the “bar” on every flip-flop and register is down – they do not take on a new value. Values propagate everywhere else in the circuit. When the clock goes from low to high, the “bars” go up, and the values sitting at the D inputs of flip-flops and registers go into them. The “bars” then come back down, and the process is repeated. CPSC 121 – 2019W T2 28
Module 9.2: Analyzing sequential circuits Example: consider the following circuit: 0 1 0 1 1 0 Time t = 0 CPSC 121 – 2019W T2 29
Module 9.2: Analyzing sequential circuits Example: consider the following circuit: 0 1 1 1 1 1 1 1 Time t = 0.5 CPSC 121 – 2019W T2 30
Module 9.2: Analyzing sequential circuits Example: consider the following circuit: 1 3 1 1 2 0 1 1 Time t = 1.0 CPSC 121 – 2019W T2 31
Module 9.2: Analyzing sequential circuits What will be the state of the circuit at time t = 5.0? 1 3 1 1 2 0 1 1 Time t = 1.0 CPSC 121 – 2019W T2 32
Module 9.2: Analyzing sequential circuits What will be the state of the circuit at time t = 5.0? 1 3 3 1 1 2 0 0 Time t = 1.5 CPSC 121 – 2019W T2 33
Module 9.2: Analyzing sequential circuits What will be the state of the circuit at time t = 5.0? 3 4 3 1 1 1 1 0 Time t = 2.0 CPSC 121 – 2019W T2 34
Module 9.2: Analyzing sequential circuits What will be the state of the circuit at time t = 5.0? 3 4 4 1 1 1 1 1 Time t = 2.5 CPSC 121 – 2019W T2 35
Module 9.2: Analyzing sequential circuits What will be the state of the circuit at time t = 5.0? 4 6 4 1 2 0 1 1 Time t = 3.0 CPSC 121 – 2019W T2 36
Module 9.2: Analyzing sequential circuits What will be the state of the circuit at time t = 5.0? 4 6 6 11 2 0 0 Time t = 3.5 CPSC 121 – 2019W T2 37
Module 9.2: Analyzing sequential circuits What will be the state of the circuit at time t = 5.0? 6 7 6 11 1 1 0 Time t = 4.0 CPSC 121 – 2019W T2 38
Module 9.2: Analyzing sequential circuits What will be the state of the circuit at time t = 5.0? 6 7 7 111 1 1 1 1 Time t = 4.5 CPSC 121 – 2019W T2 39
Module 9.2: Analyzing sequential circuits What will be the state of the circuit at time t = 5.0? 7 9 7 111 2 0 1 1 Time t = 5.0 CPSC 121 – 2019W T2 40
Module 9: Sequential Circuits Module Summary Latches, toggles and flip-flops. Analyzing sequential circuits. Other problems and exercises. CPSC 121 – 2019W T2 41
Module 9.3: Other problems and exercises Real numbers: We can write numbers in decimal using the format (-)? d+ (.d+)? where the ( )? mean that the part in parentheses is optional, and d+ stands for “1 or more digits”. Design a DFA that will accept input strings that are valid real numbers using this format. You can use else as a label on an edge instead of listing every character that does not appear on another edge leaving from a state. CPSC 121 – 2019W T2 42
Module 9.3: Other problems and exercises Real numbers (continued) Then design a circuit that turns a LED on if the input is a valid real number, and off otherwise. Hint: Logisim has a keyboard component you can use. Hint: my DFA for this problem has 6 states. Design a DFA for a vending machine that sells one of three items (lemon juice, whiteboard markers, and corn flour) for 35¢ each. It should accept 5¢, 10¢ and 25¢ coins, and does not need to return change. CPSC 121 – 2019W T2 43
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