CPSC 121: Models of Computation 2017S Building & Designing Sequential Circuits Meghan Allen, based on notes by Steve Wolfman, Patrice Belleville and others 1 This work is licensed under a Creative Commons Attribution 3.0 Unported License.
Outline • Prereqs, Learning Goals, and Quiz Notes • Problems and Discussion – A Pushbutton Light Switch – Memory and Events: D Latches & Flip-Flops – General Implementation of DFAs (with a more complex DFA as an example) – How Powerful are DFAs? • Next Lecture Notes 2
Learning Goals: Pre-Class We are mostly departing from the readings to talk about a new kind of circuit on our way to a full computer: sequential circuits. The pre-class goals are to be able to: – Trace the operation of a deterministic finite-state automaton (represented as a diagram) on an input, including indicating whether the DFA accepts or rejects the input. – Deduce the language accepted by a simple DFA after working through multiple example inputs. 3
Learning Goals: In-Class By the end of this unit, you should be able to: – Translate a DFA to a corresponding sequential circuit, but with a “hole” in it for the circuitry describing the DFA’s transitions. – Describe the contents of that “hole” as a combinational circuitry problem (and therefore solve it, just like you do other combinational circuitry problems!). – Explain how and why each part of the resulting circuit works. 4
Where We Are in The Big Stories Theory Hardware How do we model How do we build devices to computational systems? compute? Now : With our powerful Now : Learning to build a modelling language (pred. new kind of circuit with logic), we can prove things memory that will be like universality the key new feature of NOR gates for we need to build full- combinational circuits. blown computers! Our new model (DFAs) are sort (Something you’ve seen in of full computers. lab from a new angle.) 5
Outline • Prereqs, Learning Goals, and Quiz Notes • Problems and Discussion – A Pushbutton Light Switch – Memory and Events: D Latches & Flip-Flops – General Implementation of DFAs (with a more complex DFA as an example) – How Powerful are DFAs? • Next Lecture Notes 6
Problem : Push-Button Light Switch Problem: Design a circuit to control a light so that the light changes state any time its “push - button” switch is pressed. (Like the light switches in some buildings on campus: Press and release, and the light changes state. Press and release again, and it changes again.) ? 7
? A Light Switch “DFA” pressed light light off on pressed This Deterministic Finite Automaton (DFA) isn’t really about accepting/rejecting; its current state is the state of the light. 8
Problem : ? Light Switch Problem : Design a circuit to control a light so that the light changes state any time its “push - button” switch is pressed. Identifying inputs/outputs: consider Which are most useful for these possible inputs and outputs: this problem? Input : the button was pressed or a. pressed and shining the button is down b. pressed and changed c. down and shining Output : the light is shining or d. down and changed the light changed states e. None of these 9
? COMPARE TO : Lecture 2’s Light Switch Problem : Design a circuit to control a light so that the light changes state any time its switch is flipped . Identifying inputs/outputs: consider Which are most useful for these possible inputs and outputs: this problem? Input : the switch flipped or a. flipped and shining the switch is up b. flipped and changed c. up and shining Output : the light is shining or d. up and changed the light changed states e. None of these 10
Outline • Prereqs, Learning Goals, and !Quiz Notes • Problems and Discussion – A Pushbutton Light Switch – Memory and Events: D Latches & Flip-Flops – General Implementation of DFAs (with a more complex DFA as an example) – How Powerful are DFAs? • Next Lecture Notes 11
Departures from Combinational Circuits MEMORY : We need to “remember” the light’s state. EVENTS : We need to act on a button push rather than in response to an input value. 12
Problem: How Do We Remember? We want a circuit that: • Sometimes … remembers its current state. • Other times … loads a new state to remember. Sounds like a choice . What circuit element do we have for modelling choices? 13
Worked Problem: “ Muxy Memory” How do we use a mux to store a bit of memory? We choose to remember on a control value of 0 and to load a new state on a 1. (remember) ??? 0 output new data 1 control We use “0” and “1” because that’s how MUXes are usually labelled. 14
Worked Problem: Muxy Memory How do we use a mux to store a bit of memory? We choose to remember on a control value of 0 and to load a new state on a 1. old output (Q’) 0 output (Q) new data (D) 1 control (G) This violates our basic combinational constraint: no cycles. 15
Truth Table for “Muxy Memory” Fill in the MM’s truth table: a. b. c. d. e. G D Q' Q Q Q Q None of 0 0 0 0 0 0 0 these 0 0 1 1 1 1 0 0 1 0 0 0 0 0 0 1 1 1 1 1 1 1 0 0 0 0 0 1 1 0 1 1 0 X 1 1 1 0 0 1 X 0 1 1 1 1 1 1 1 16
Worked Problem: Truth Table for “Muxy Memory” Worked Problem: Write a truth table for the MM: G D Q' Q 0 0 0 0 0 0 1 1 0 1 0 0 0 1 1 1 1 0 0 0 1 0 1 0 1 1 0 1 1 1 1 1 Like a “normal” mux table, but what happens when Q' Q? 17
Worked Problem: Truth Table for “Muxy Memory” Worked Problem: Write a truth table for the MM: G D Q' Q 0 0 0 0 0 0 1 1 0 1 0 0 0 1 1 1 1 0 0 0 1 0 1 0 1 1 0 1 1 1 1 1 Q' “takes on” Q’s value at the “next step”. 18
“D Latch” Symbol + Semantics We call a “ muxy memory” a “D latch”. When G is 0, the latch maintains its memory. When G is 1, the latch loads a new value from D. old output (Q’) 0 output (Q) new data (D) 1 control (G) 19
D Latch Symbol + Semantics When G is 0, the latch maintains its memory. When G is 1, the latch loads a new value from D. old output (Q’) 0 output (Q) new data (D) 1 control (G) 20
D Latch Symbol + Semantics When G is 0, the latch maintains its memory. When G is 1, the latch loads a new value from D. D new data (D) Q output (Q) control (G) G 21
D ON ’ T P ANIC ! Hold On!! Why does the D Latch have two inputs and one output when the mux inside has THREE inputs and one output? a. The D Latch is broken as is; it should have three inputs. b. A circuit can always ignore one of its inputs. c. One of the inputs is always true. d. One of the inputs is always false. e. None of these (but the D Latch is not broken as is). 22
Using the D Latch for Circuits with Memory Problem : What goes in the cloud? What do we send into G? D Q Combinational ?? G Circuit to calculate next state input We assume we just want Q as the output. 23
Using the D Latch for Our Light Switch Problem : What do we send into G? D current light state Q ?? G no (0 bit) input output a. T if the button is down, F if it’s up. b. T if the button is up, F if it’s down. c. Neither of these. 24
A Timing Problem: We Need EVENTS! Problem : What do we send into G? D current light state “pulse” Q when G button is pressed output As long as the button is down, D flows to Q flows through the NOT gate and back to D... button which is bad! pressed 25
A Timing Problem, Metaphor (from MIT 6.004, Fall 2002) What’s wrong with this tollbooth? P.S. Call this a “bar”, not a “gate”, or we’ll tie ourselves in (k)nots. 26
A Timing Solution, Metaphor (from MIT 6.004, Fall 2002) Is this one OK? 27
A Timing Problem Problem : What do we send into G? D current light state “pulse” Q when G button is pressed output As long as the button is down, D flows to Q flows through the NOT gate and back to D... button which is bad! pressed 28
A Timing Solution (Almost) D D Q Q L R G G Never raise both “bars” at output the same time. button pressed 29
A Timing Solution D D Q Q L R G G ?? output The two latches are never enabled at the same time (except for the moment needed for the NOT gate on the left to compute, which is so short that no “cars” get through). 30
A Timing Solution D D Q Q L R G G button output press signal button pressed 31
Button/Clock is LO (unpressed) 1 1 D D Q Q L R 0 1 G G output LO 0 We’re assuming the circuit has been set up and is “running normally”. Right now, the light is off (i.e., the output of the right latch is 0). 32
Button goes HI (is pressed) 1 1 D D Q Q L R 0 1 G G output HI 1 This stuff is processing a new signal. 33
Propagating signal.. left NOT, right latch 1 1 D D Q Q L R 1 0 G G output HI 1 This stuff is processing a new signal. 34
Propagating signal.. right NOT (steady state) 0 1 D D Q Q L R 1 0 G G output HI 1 Why doesn’t the left latch update? a. Its D input is 0. b. Its G input is 0. c. Its Q output is 1. d. It should update! 35
Button goes LO (released) 0 1 D D Q Q L R 1 0 G G output LO 0 This stuff is processing a new signal. 36
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