CMP Process Development Techniques for New Materials Robert L. Rhoades, Ph.D. ECS 213 th Meeting (Phoenix, AZ) May 19-21, 2008
Outline • Background and Industry Drivers • Generalized Development Sequence • CMP Process Development Techniques • Examples • Conclusions Our Expertise, Our Services, Your Success 2
A Market Divided Background • Why are development techniques so important? SPEED and COST! – New products must be ready on time for market launch – Long term efficiency improves competitive strength • Moore’s Law dominates the CMOS industry – Not affected by cycles, markets, analysts, or the economy • Photolithography and CMP are two critical process technologies to continue both cost and performance improvements – Photolithography enables SHRINKS – CMP enables more complex STACKS • Trend has held for >35 years ! Our Expertise, Our Services, Source: Intel Corporation Your Success 3
Market Driver … The Consumer Source: 2007 Industry Strategy Symposium – Hans Stork, CTO, Texas Instruments • What do they want? More, Better, Faster, Smaller, and Cheaper. • 2005 inflection point for semiconductors: consumer-based products become primary industry driver. Source: 2007 MEPTEC – Jim Walker, Gartner Dataquest • Consumers demand More for Less . • Consumers demand More in Less . • Historically enabled by Moore’s Law – device shrinks & larger wafers. Our Expertise, Our Services, Your Success 4
CMP Drivers (1) % of Wafers Using CMP is Increasing (2) # CMP Polishes per Wafer is Increasing + = VOLUME (3) # CMP Polish Applications is Increasing (4) Each Application Requires a New CMP Process 1995 2001 2008 Glass (oxide) Glass (oxide) Glass (oxide) Tungsten Tungsten Tungsten Copper Copper Shallow Trench Shallow Trench Polysilicon Polysilicon + Low k = TECHNOLOGY Cap Ultra Low k Metal Gates Gate Insulators Sources: Cabot Microelectronics Corp. & Entrepix, Inc. High k Dielectrics Ir & Pt Electrodes Our Expertise, Magnetics Our Services, Your Success 5
Grow th in Applications CMP is still growing for CMOS applications ... And many newer applications are now also being developed beyond “traditional” CMP. • Traditional CMOS Applications • MEMS - Oxide (ILD, pre-metal dielectric, etc.) - Oxides (doped or undoped) - Tungsten (plugs or local interconnect) - Polysilicon (usually structural) - Shallow trench isolation (STI) - Nitrides and oxynitrides - Copper (integrated with or w/o low-k dielectric) - Separation layer (MEMS-first or MEMS-last) • New Apps for CMOS devices • Other - Polysilicon - Strained layer epi substrates - Polymers (both low-k and other uses) - Custom III-IV and II-IV epi layers - Capping layers - Phase change memory materials - High-k dielectrics - Photoresist and other polymers - Gate insulators - Magnetic materials (active or shielding) - Metal gates - Grating structures - Noble metal contacts - Integrated optical layers - Advanced packaging - 3D IC’s and similar structures Our Expertise, Our Services, Your Success 6
Development Sequence Development Sequence • The vast majority of development efforts follow this basic path Design Concept • Each stage has certain inputs Materials Selection required, activities to be performed, Integration Planning and desired outputs that increase in difficulty and complexity for each Process Development successive stage Device Prototype • Each stage assumes successful completion of the previous stage, or Optimization at least overlapping execution of the previous stage Qualification Pilot Production • Failure at any stage usually means backing up at least one stage to try High Volume Manufacturing again Our Expertise, Our Services, Your Success 7
Stage Detail #1 Stages leading to a working device prototype … Stage Resources Activities Stage Outputs Design Concept Designers 1.Brainstorming Approval from R&D team, R&D team 2.Sketches/drawings/etc. management for design 3.Documentation approach & use of CMP Materials Selection Designers 1.Assess extendability of List of primary materials and R&D team existing materials & processes backups, if possible, for all Materials scientists 2.Propose/evaluate alternatives materials to be polished Integration Planning Designers 1. Assess extendability of First pass process flow R&D team integration & process flow showing each CMP level Integration team 2. Propose alternatives Process Development Integration team 1.Process screening expt Demonstration of initial Process engineering 2.Repeat trials until acceptable process for new materials, Test wafers performance on blanket films new modules or processes Eng time on process tools 3.Early patt test wfrs (maybe) needing major improvements Device Prototype Integration team 1.First silicon on new masks One or a few working devices Process engineering 2.Lots of analysis (SEM,etc.) & proposals for improving Analytical support team any critical path items Wafers & process tool (eng) Our Expertise, Our Services, Your Success 8
Stage Detail #2 Stages leading to revenue … Stage Resources Activities Stage Outputs Optimization Integration team 1.Refine CMP process based Iterative improvements until Process engineering on details from first silicon acceptable performance and Analytical support team 2.Explore process windows yield are achieved Wafers & process tools (1x) 3.Repeat trials (consistency) Qualification Engineering teams 1.Produce live devices for qual Devices for burn-in & life test Manufacturing teams 2.Prep for transfer to mfg Documentation in place for Wafers & process tools (1x) 3.Establish initial SPC limits each process step Pilot Production Manufacturing teams 1.Transfer control to mfg Sellable devices Engineering teams 2.Monitor device and process Assessment of any issues Wafers metrics for signs of instability showing up as volume ramps Process tools (multiple) 3.Refine and lock SPC limits Volume Manufacturing Manufacturing teams 1.Manufacturing controls Profitable devices Engineering teams 2.Monitor SPC trends Technical inputs for next gen Wafers 3.ID yield/cost improvement device designs Process tools (multiple) targets & requal when justified Our Expertise, Our Services, Your Success 9
CMP Metrics • Most CMP processes are measured on 5 basic metrics Removal Rate and Uniformity Defectivity Planarization (step height, dishing/erosion, surface roughness, etc.) Process Stability (repeatability from wfr-to-wfr, run-to-run, etc.) Cost per Wafer Our Expertise, Our Services, Your Success 10
Interactions CMP Process Metrics Process Settings Rate Uniformity Defectivity Planarization Down force, DF STRONG weak Moderate STRONG Back pressure, BP weak Moderate weak weak Table speed, TS STRONG weak Moderate STRONG Moderate Carrier speed, CS weak weak weak (often nonlinear) Slurry flow, SF nonlinear nonlinear Moderate weak Conditioner force weak weak weak Moderate Conditioner speed don't care don't care weak weak Our Expertise, Our Services, Your Success 11
CMP Development • Zoom in on CMP process development CMP Development Sequence • Assumes fundamentals of pad/slurry Generate Test Wafers research are already done by suppliers Consumables Screening • Test wafer availability and quality often impact timeline, validity of results, etc. Process DOE's • Initial process DOE’s generally focus on Optimize Uniformity removal rate and gross surface quality • Optimization stages can be interchanged Optimize Planarity or executed in parallel Optimize Defectivity • Planarity can mean step height, dishing, erosion, roughness, etc. depending on the Repeatability (multiple runs) material and intended application Stability (marathon) • Failure at any stage usually means backing up at least one stage to try again Release for Device Qualification Our Expertise, Our Services, Your Success 12
Early CMP Stages Early stage development efforts often involve: • Immature deposition or growth processes • Poorly characterized materials or integrations • Technologists who may not be familiar with CMP and how it interacts with other process modules • Wide variation in pattern density/feature sizes • Wafer sizes smaller than 200 mm • Limited availability of test wafer These factors can create huge challenges for CMP Our Expertise, Our Services, Your Success 13
Consumables Screening Resources Desired Outputs � Pads (one or more types) � Choose pad/slurry that achieve: � Slurries (one or more types) � Removal Rate at or above target � Blanket film test wafers � Surface finish acceptable (1 st pass) Experimental Plan Inputs � Include blanket films or bulk samples of ALL materials � Change pads with major changes in slurry � Stick to one mid-point recipe as a common data point for all combinations � Include supplier-recommended process recipes whenever practical � Keep data analysis quick and simple (optimize later) Our Expertise, Our Services, Your Success 14
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