ARM Cortex-M4 Programming Model Logical and Shift Instructions References: Textbook Chapter 4, Sections 4.1, 4.2, 4.3, 4.5, 4.6, 4.9 “ARM Cortex-M Users Manual”, Chapter 3 1
CPU instruction types Data movement operations memory-to-register and register-to-memory includes different memory “addressing” options “memory” includes peripheral function registers register-to-register constant-to-register (or to memory in some CPUs) Arithmetic operations add/subtract/multiply/divide multi-precision operations (more than 32 bits) Logical operations and/or/exclusive-or/complement (between operand bits) shift/rotate bit test/set/reset compare Flow control operations branch to a location (conditionally or unconditionally) branch to a subroutine/function return from a subroutine/function 2
Bitwise Logic AND {Rd,} Rn, Op2 Bitwise logic AND. Rd ← Rn & operand2 ORR {Rd,} Rn, Op2 Bitwise logic OR. Rd ← Rn | operand2 EOR {Rd,} Rn, Op2 Bitwise logic exclusive OR. Rd ← Rn ^ operand2 ORN {Rd,} Rn, Op2 Bitwise logic NOT OR. Rd ← Rn | (NOT operand2) BIC {Rd,} Rn, Op2 Bit clear. Rd ← Rn & NOT operand2 BFC Rd, #lsb, #width Bit field clear. Rd[(width+lsb–1):lsb] ← 0 BFI Rd, Rn, #lsb, #width Bit field insert. Rd[(width+lsb–1):lsb] ← Rn[(width-1):0] Move NOT, logically negate all bits. MVN Rd, Op2 Rd ← 0xFFFFFFFF EOR Op2 3 Yifeng Zhu Lecture Slides
ARM Logic Operations A B A&B A|B A^B A&(~B) A|(~B) ~A Rn Operand2 AND ORR EOR BIC ORN MVN 0 0 0 0 0 0 1 1 0 1 0 1 1 0 0 1 1 0 0 1 1 1 1 0 1 1 1 1 0 0 1 0 Bit-Wise Logic Instructions AND{S} {Rd,} Rn, <op2> ; Rd=Rn & op2 ORR{S} {Rd,} Rn, <op2> ; Rd=Rn | op2 EOR{S} {Rd,} Rn, <op2> ; Rd=Rn ^ op2 BIC{S} {Rd,} Rn, <op2> ; Rd=Rn & (~op2) (bit clear) ORN{S} {Rd,} Rn, <op2> ; Rd=Rn | (~op2) MVN{S} Rd, <op2> ; Rd=(~op2) (complement all bits) Bard, Gerstlauer, Valvano, Yerraballi
To set bits Use the or operation to set selected bits of a register to 1. (The other bits remain constant.) Friendly software modifies just the bits that need to be. GPIO_PORTD_DIR_R |= 0x03; // Set PD1,PD0 outputs Assembly: LDR R0,=GPIO_PORTD_DIR_R LDR R1,[R0] ; read previous value ORR R1,R1,#0x03 ; set bits 0 and 1 STR R1,[R0] ; update c 7 c 6 c 5 c 4 c 3 c 2 c 1 c 0 value of R1 0x03 constant (“mask”) 0 0 0 0 0 0 1 1 c 7 c 6 c 5 c 4 c 3 c 2 1 1 result of the ORR Bard, Gerstlauer, Valvano, Yerraballi
Set a Bit (in C) a |= (1 << k) or a = a | (1 << k) Example: k = 5 a 7 a 6 a 5 a 4 a 3 a 2 a 1 a 0 a 0 0 1 0 0 0 0 0 1 << k a 7 a 6 a 4 a 3 a 2 a 1 a 0 1 a | (1 << k) 6
To clear bits Use the and operation to clear selected bits of a register. GPIO_PORTD_DIR_R &= 0xFC; // PD1,PD0 inputs Assembly: LDR R0,=GPIO_PORTD_DIR_R LDR R1,[R0] ; read previous value AND R1,R1,#0xFC ; clear bits 0 and 1 STR R1,[R0] ; update c 7 c 6 c 5 c 4 c 3 c 2 c 1 c 0 value of R1 0xFC constant (“mask”) 1 1 1 1 1 1 0 0 c 7 c 6 c 5 c 4 c 3 c 2 0 0 result of the AND Bard, Gerstlauer, Valvano, Yerraballi
Clear a Bit (in C) a &= ~(1<<k) a = a & ~(1<<k) Example: k = 5 a 7 a 6 a 5 a 4 a 3 a 2 a 1 a 0 a (1 << k) 0 0 1 0 0 0 0 0 1 1 0 1 1 1 1 1 ~(1 << k) a 7 a 6 a 4 a 3 a 2 a 1 a 0 0 a & ~(1<<k) 8
Using BIC to clear bits Use the bic operation to clear selected bits of a register. GPIO_PORTD_DIR_R &= ~0x03; // PD1,PD0 inputs Assembly: LDR R0,=GPIO_PORTD_DIR_R LDR R1,[R0] ; read previous value BIC R1,R1,#0x03 ; clear bits 0 and 1 STR R1,[R0] ; update c 7 c 6 c 5 c 4 c 3 c 2 c 1 c 0 value of R1 0x03 = ~0xFC = “mask” 1 1 1 1 1 1 0 0 c 7 c 6 c 5 c 4 c 3 c 2 0 0 result of the AND Similar to AND, but more “straightforward” - bits to be cleared are designated. Bard, Gerstlauer, Valvano, Yerraballi
To toggle The exclusive or operation can also be used to toggle bits. GPIO_PORTD_DATA_R ^= 0x80; /* toggle PD7 */ Assembly: LDR R0,=GPIO_PORTD_DATA_R LDR R1,[R0] ; read port D EOR R1,R1,#0x80 ; toggle bit 7 STR R1,[R0] ; update b 7 b 6 b 5 b 4 b 3 b 2 b 1 b 0 value of R1 0x80 constant 1 0 0 0 0 0 0 0 ~b 7 b 6 b 5 b 4 b 3 b 2 b 1 b 0 result of the EOR Bard, Gerstlauer, Valvano, Yerraballi
Toggle a Bit (in C) Without knowing the initial value, a bit can be toggled by XORing it with a “ 1 ” a ^= 1<<k Example: k = 5 a 7 a 6 a 5 a 4 A 3 a 2 a 1 a 0 a 0 0 1 0 0 0 0 0 1 << k a 7 a 6 NOT( a 5 ) a 4 a 3 a 2 a 1 a 0 a ^= 1<<k a 5 a 5 ⊕ 1 1 0 1 1 1 1 0 Truth table of Exclusive OR with one 11
Switch Interfacing +3.3V +3.3V Not LM3S or LM3S or pressed Pressed TM4C TM4C 10k Ω s t Input port Input port 10k Ω Open Closed Negative logic Positive logic The and operation to extract, or mask , individual bits: Pressed = GPIO_PORTA; //true if PA6 switch pressed Assembly : LDR R0,=GPIO_PORTA LDRB R1,[R0] ; read port A ANDS R1,#0x40 ; clear all bits except bit 6 BNE SwitchSet ; branch if Switch pulled high a 7 a 6 a 5 a 4 a 3 a 2 a 1 a 0 value of R1 0x40 constant 0 1 0 0 0 0 0 0 result of the AND 0 a 6 0 0 0 0 0 0 Note: If 8-bit result is zero, then we know a 6 = 0 If the 8-bit result is non-zero, then a 6 = 1 Bard, Gerstlauer, Valvano, Yerraballi
Switch Interfacing +3.3V +3.3V Not LM3S or LM3S or pressed Pressed TM4C TM4C 10k Ω s t Input port Input port 10k Ω Open Closed Negative logic Positive logic The TST operation to extract, or mask , individual bits: Pressed = GPIO_PORTA; //true if PA6 switch pressed Assembly : LDR R0,=GPIO_PORTA LDRB R1,[R0] ; read port A TST R1,#0x40 ; clear all bits except bit 6 BNE SwitchSet ; branch if Switch pulled high ----------------------- TST performs the ANDS operation, except that the left- hand operand (R1 above) remains unchanged – only the flags are set. Note: If 8-bit result is zero, then we know a 6 = 0 If the 8-bit result is non-zero, then a 6 = 1 Bard, Gerstlauer, Valvano, Yerraballi
Shift Operations 31 30 29 28 27 26 1 0 C Logical Shift Right 1<n<32 LSR 0 Arithmetic Shift Right 1<n<32 ASR Logical Shift Left 0<n<31 LSL 0 Rotate Shift Right 1<n<32 ROR Rotate Right Extended n=1 RRX Formats: LSL Rd, Rm, # imm ; imm = # bit positions to shift (n) LSL Rd, Rm, Rs ; Rs = # bit positions to shift (n) Use the ASR instruction when manipulating signed numbers, and use the LSR instruction when shifting unsigned numbers Bard, Gerstlauer, Valvano, Yerraballi
Barrel Shifter Second ALU operand has a special hardware called Barrel shifter Shift a designated #bits left/right in one step Example: ADD r1, r0, r0, LSL #3 ; r1 = r0 + r0 << 3 = 9 × r0 15
Shift Example High and Low are unsigned 4-bit components, which will be combined into a single unsigned 8-bit Result . Result = (High<<4)|Low; Assembly: LDR R0,=High LDR R1,[R0] ; read value of High LSL R1,R1,#4 ; shift into position LDR R0,=Low LDR R2,[R0] ; read value of Low ORR R1,R1,R2 ; combine the two parts LDR R0,=Result STR R1,[R0] ; save the answer 0 0 0 0 h 3 h 2 h 1 h 0 value of High in R1 h 3 h 2 h 1 h 0 0 0 0 0 after last LSL 0 0 0 0 l 3 l 2 l 1 l 0 value of Low in R2 h 3 h 2 h 1 h 0 l 3 l 2 l 1 l 0 result of the ORR instruction Bard, Gerstlauer, Valvano, Yerraballi
Example: C statements C: z = (a << 2) | (b & 15); Assembler: LDR r4,=a ; get address for a LDR r0,[r4] ; get value of a LSL r0,r0,#2 ; perform shift LDR r4,=b ; get address for b LDR r1,[r4] ; get value of b AND r1,r1,#15 ; perform AND ORR r1,r0,r1 ; perform OR LDR r4,=z ; get address for z STR r1,[r4] ; store value for z 17
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