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A Local Optimal Method on DSA Guiding Template Assignment with Redundant/Dummy Via Insertion Xingquan Li 1 , Bei Yu 2 , Jianli Chen 1 , Wenxing Zhu 1 , 24th Asia and South Pacific Design T h e p i c Automation Conference t u r e c a


  1. A Local Optimal Method on DSA Guiding Template Assignment with Redundant/Dummy Via Insertion Xingquan Li 1 , Bei Yu 2 , Jianli Chen 1 , Wenxing Zhu 1 , 24th Asia and South Pacific Design T h e p i c Automation Conference t u r e c a n 't b e d Tokyo Japan 2019 i s p l a y e d . 1 Fuzhou University 2 The Chinese University of Hong Kong 1

  2. Outline Introductions Problem Formulation Algorithm Experimental Results Conclusions 2

  3. Outline Introductions Problem Formulation Algorithm Experimental Results Conclusions 3

  4. Block Copolymers Directed Self-Assembly (DSA) l Block copolymer (BCP) ¾ A unique string of two types of polymer. ¾ One type of polymer is hydrophilic and another is hydrophobic. l Nanostructures ¾ Cylinders, spheres, and lamellae. ¾ The cylindrical nanostructure is suitable for patterning contacts and vias. Polymer-A Polymer-B (PS) (PMMA) Lamellae Cylinders (A=B) (A>B) 4

  5. DSA Process l Vias are not regularly placed in practical layout. l A simple regular hole array generated by standard DSA is not suitable for IC fabrication. l Topological template guided DSA process has been proposed to support patterning irregularly vias layout. l Closed vias are grouped; And a guiding template is identified for each group. Guiding template Via Via group v 1 v 2 v 3 Metal DSA pattern 5

  6. DSA Process l Given a vias layout, we should assign the guiding templates for every via. l Guiding templates are patterned on a wafer through optical lithography. l Each guiding template is filled with BCPs. l DSA can be controlled by thermal annealing process. Guided by template Pattern template by 193i DSA design process 6

  7. Guiding Templates l Pre-defined DSA pattern set to improve robust. l Within-group contact/via distance. l Complex shapes are difficult to print. l Unexpected holes and placement error of holes for some patterns. l The distance of any two guiding templates should larger than minimum optical resolution spacing d s. d s v 1 v 2 v 3 7

  8. Redundant Via Insertion (RVI) l Insert an extra via near a single via. l Prevent via failure, improve circuit yield and reliability. v 2 v 1 v 3 r v r r r 2 v 2 r v 2 r 3 r 2 v 1 v 3 8

  9. Dummy Via Due to the characteristic of DSA, vias in a group must match some l specific patterns so that they can be assigned to the same guiding template. Increase the choices to form guiding templates with the help of l dummy via insertion. v 2 r 3 r 2 v 2 r 3 r 2 v 1 v 3 v 1 v 3 Case 3 ✓ ✘ ✘ v 2 v 2 v 2 r 3 r 3 r 3 r 2 r 2 r 2 v 1 v 3 v 1 v 3 v 1 v 3 d 1 Case 1 Case 2 Case 4 9

  10. Outline Introductions Problem Formulation Algorithm Experimental Results Conclusions 10

  11. DSA Guiding Template Assignment with Redundant/Dummy Via Insertion (DRDV) l Input ¾ Post-routing layout v 1 v 2 ¾ Usable DSA guiding templates ¾ Optical resolution limit space v 3 v 5 v 4 v 6 Post-routing layout Usable DSA guiding templates d s Optical resolution limit space 11

  12. DSA Guiding Template Assignment with Redundant/Dummy Via Insertion (DRDV) l Input ¾ Post-routing layout v 1 v 2 r 3 ¾ Usable DSA guiding templates ¾ Optical resolution limit space r 1 r 2 v 3 l Output ¾ Redundant via insertion for every via ¾ Guiding template assignment with v 5 r 4 d 1 suitable dummy vias for every via and redundant via v 4 v 6 r 6 12

  13. DSA Guiding Template Assignment with Redundant/Dummy Via Insertion (DRDV) l Input ¾ Post-routing layout ¾ Usable DSA guiding templates ¾ Optical resolution limit space l Output ¾ Redundant via insertion for every via ¾ Guiding template assignment with suitable dummy vias for every via and redundant via l Constraints ¾ Inserted redundant vias should be legal ¾ The spacing between neighboring guiding template should larger than the optical resolution limit space l Objectives ¾ Maximize the number (ratio) of inserted redundant vias ¾ Maximize the number (ratio) of patterned vias by DSA 13

  14. Outline Introductions Problem Formulation Algorithm Experimental Results Conclusions 14

  15. Solution Flow DSA Guiding Routing Optical resolution Template Layout limit spacing d s Preprocessing Find All Redundant/Dummy Via Candidates Detect Building Blocks Construct Conflict Graph Local Optimal Solver Integer Linear Programming Formulation Initial Solution Generation Unconstrained Nonlinear Programming Solver Redundant/Dummy Via Insertion with Template Assignment 15

  16. Preprocessing DSA Guiding Routing Optical resolution Template Layout limit spacing d s Preprocessing Find All Redundant/Dummy Via Candidates Detect Building Blocks Construct Conflict Graph Local Optimal Solver Integer Linear Programming Formulation Initial Solution Generation Unconstrained Nonlinear Programming Solver Redundant/Dummy Via Insertion with Template Assignment 16

  17. Redundant/Dummy Via Candidates l Redundant via candidate ¾ It should be inserted next to every via. ¾ It should not overlap with any metal wire from other nets of wires. l Dummy via candidate ¾ It can make up a multi-hole (not less than three holes) guiding template with other vias or redundant vias. ¾ It can improve the insertion rate or manufacture rate. l Find all redundant/dummy via candidates for every via in time O ( n ). r 2 r 1 v 2 r 2 v 2 v 1 v 1 17

  18. Building-Blocks l building-block1: a original via l building-block2: a redundant via l building-block3: a original via and a redundant via l building-block4: two original vias l building-block5: two redundant vias l building-block6: a original via and a redundant via (diagonal) l building-block7: two original vias (diagonal) l building-block8: two redundant vias (diagonal) l building-block9: six original/redundant vias 1 2 3 4 5 6 7 8 9 18

  19. Combinations of Building-Blocks 1 2 3 4 5 6 7 8 9 l Combinations of building-blocks to form guiding templates 19

  20. Building-Blocks Detection & Conflict Graph l Conflict graph CG (V, E ) ¾ vertex v ∈ V denotes a building-block , ¾ e ij ∈ E is an edge and E = (E C −E T ) ∪ E O . E C , E T and E O are the sets of conflict edges, template edges and overlap edges. v 2 r 1 a c b d e f v 2 r 1 v 2 r 1 v 1 v 2 r 1 v 1 v 1 v 1 b d c Conflict edge Overlap edge Template edge a f e 20

  21. Conflict Edges l The distance between two building-blocks are less than resolution limit space d s. a b c d e f v 2 r 1 v 2 v 1 v 2 r 1 r 1 v 1 v 1 b d v 2 r 1 c v 1 a e f f r 1 v 2 e Conflict edge Overlap edge v 1 Template edge 21

  22. Overlap Edges l Two building-blocks are overlapped. a b c d e f v 2 r 1 v 2 v 1 v 2 r 1 r 1 v 1 v 1 b d v 2 r 1 d f c r 1 v 2 v 1 v 1 a f e Conflict edge Overlap edge Template edge 22

  23. Template Edges l If building-blocks i and j with e ij ∈ E C can be assigned to a guiding template without any design error. a b c d e f v 2 r 1 v 2 v 1 v 2 r 1 r 1 v 1 v 1 b d c v 2 r 1 v 2 r 1 c a v 1 v 1 a f e Conflict edge Overlap edge Template edge 23

  24. Solution Flow DSA Guiding Routing Optical resolution Template Layout limit spacing d s Preprocessing Find All Redundant/Dummy Via Candidates Detect Building Blocks Construct Conflict Graph Local Optimal Solver Integer Linear Programming Formulation Initial Solution Generation Unconstrained Nonlinear Programming Solver Redundant/Dummy Via Insertion with Template Assignment 24

  25. Constraints b d d f c c r 1 v 2 v 2 r 1 a v 1 ✘ v 1 a f ✓ e e f r 1 v 2 ✘ v 1 ∪ E = ( E C − E T ) E O Template edge Conflict edge Overlap edge 25

  26. Conflict Structure Constraint l Template constraint ¾ If two building-blocks i and j are connected by a template edge, then they may be assigned to the same guiding template, but not necessarily. ¾ If both of building-blocks i and l connect with k by template edges, then i, k, l may not be assigned to a same guiding template. l Conflict structure (CS) ¾ Three bblocks i , k and l , in which e ik and e kl are template edges and there does not exist any edge between i and l . l k k i k l i l i 26

  27. Integer Linear Programming (ILP) l Objectives: ¾ Maximize the number of inserted redundant vias ¾ Maximize the number of patterned vias by DSA ¾ Let N v and N r are the numbers of included vias and redundant vias by building-block i, and l ILP Formulation (1) 27

  28. Inequality Constraints l Claim 1. The ILP is equivalent to the DRDV problem. (1) l Transfer inequality constraints to equality constraints. (2) 28

  29. Equality Constraints l Relax equality constraints to objective function. (2) (3) 29

  30. Adjacent Matrix & CS Tensor l Handle adjacent matrix and CS tensor. (3) (4) ! "# = %1, ( "# ∈ * - "./ = 01, (2, 3, 4) ∈ -6 0, ( "# ∉ * 0, (2, 3, 4) ∉ -6 30

  31. Unconstrained Nonlinear Programming (UNP) (4) ! " = $1, ' " ≥ 0 0, ' " < 0 1 = 2 = 4 0.8 = 6 = 8 0.6 = 10 0.4 0.2 (5) 0 -1 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1 31

  32. UNP Solver (5) Greedy selection method Wolfe-Powell inexact line search method 32

  33. Local Optimal Convergence l Lemma 1. Under above Equations, ∑ i wi∆gi ≥0. l Theorem 1. Under above Equations, f(y) does not decrease. l Corollary 1. Strict inequality ∑ i wi∆gi >0 cannot be achieved. l Theorem 2. Our UNP solver converges to a local maximum. 33

  34. Outline Introductions Problem Formulation Algorithm Experimental Results Conclusions 34

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