Topic 14 How CPU works? Professor Peter YK Cheung Dyson School of Design Engineering URL: www.ee.ic.ac.uk/pcheung/teaching/DE1_EE/ E-mail: p.cheung@imperial.ac.uk PYKC 9 June 2020 Topic 14 Slide 1 DE 1.3 - Electronics 1
A Very Simple Central Processing Unit ◆ Based on von Neumann model ◆ Stored program and data in memory ◆ Central Processing Unit (CPU) contains: CPU • Arithmetic/Logic Unit (ALU) • Control Unit I/O • Registers Memory ◆ Look into memory, sees ‘ 1 ’ and ‘ 0 ’ . Meaning depends on context. ◆ All computers requires at least three types of signals (buses): ❖ address bus - which location ❖ data bus - carries the contents of the location ❖ control bus - governs the information transfer PYKC 9 June 2020 Topic 14 Slide 2 DE 1.3 - Electronics 1
A Very Simple CPU PYKC 9 June 2020 Topic 14 Slide 3 DE 1.3 - Electronics 1
A Very simple CPU ◆ Let us design a simple processor MU0 with 16-bit instruction and minimal hardware:- • Program Counter (PC) - holds address of the next instruction to exec • Accumulator (ACC) - holds data being processed • Arithmetic Logic Unit (ALU) - performs operations on data • Instruction Register (IR) - holds current instruction code being executed ◆ Let us further assumes that the processor only has 8 instructions and can only access a maximum of 4k 16-bit words (2 12 ) of memory. ◆ The 16-bit instruction code (machine code) has a format: ◆ Note top 4 bits define the operation code (opcode) and the bottom 12 bits define the memory address of the data PYKC 9 June 2020 Topic 14 Slide 4 DE 1.3 - Electronics 1
Instruction Set 0 1 2 3 4 5 6 7 PYKC 9 June 2020 Topic 14 Slide 5 DE 1.3 - Electronics 1
Caught in the Act! machine Assembly program code 000 LDA 02E 0 02E 001 ADD 02F 2 02F MU0 addr reg 002 STO 030 1 030 PC 003 STP 7 000 -- 004 -- ACC ALU 005 -- -- 006 -- -- IR data reg ... decoder 02E AAAA AAAA 02F 1111 1111 030 -- -- ◆ CPU reading the first op-code PYKC 9 June 2020 Topic 14 Slide 6 DE 1.3 - Electronics 1
Instruction 1: LDA 02E machine MU0 Fetch code addr reg PC=000 Instruction 0 02E 000 ALU ACC 2 02F 001 Cycle 1 1 030 002 IR= 002E data reg decoder 7 000 003 -- 004 005 -- -- 006 Read MU0 addr reg Data PC = 001 ... AAAA 02E ALU 1111 02F Cycle 2 ACC= AAAA -- 030 IR=0 02E data reg decoder PYKC 9 June 2020 Topic 14 Slide 7 DE 1.3 - Electronics 1
Instruction 2: ADD 02F MU0 machine Fetch addr reg code PC=001 Instruction 0 02E 000 ALU ACC= AAAA 2 02F 001 Cycle 1 1 030 002 IR= 202F data reg decoder 7 000 003 -- 004 005 -- -- 006 MU0 addr reg PC=002 Do ADD ... AAAA 02E ALU 1111 02F Cycle 2 ACC=AAAA -- 030 IR=2 02F data reg decoder PYKC 9 June 2020 Topic 14 Slide 8 DE 1.3 - Electronics 1
Instruction 3: ST0 030 MU0 machine addr reg Fetch code PC=002 Instruction 0 02E 000 ALU ACC=BBBB 2 02F 001 Cycle 1 1 030 002 IR= 1030 data reg decoder 7 000 003 -- 004 005 -- -- 006 MU0 addr reg PC=003 ... AAAA 02E Write ALU 1111 Data 02F Cycle 2 ACC= BBBB BBBB 030 IR= 1030 data reg decoder PYKC 9 June 2020 Topic 14 Slide 9 DE 1.3 - Electronics 1
Instruction 4: STP machine Fetch code Instruction 0 02E 000 2 02F 001 MU0 addr reg 1 030 002 PC=003 7 000 003 ALU -- ACC=BBBB 004 Cycle 1 005 -- IR=7000 data reg decoder -- 006 ... AAAA 02E 1111 02F BBBB 030 PYKC 9 June 2020 Topic 14 Slide 10 DE 1.3 - Electronics 1
A video on “How a CPU is made?” PYKC 9 June 2020 Topic 14 Slide 11 DE 1.3 - Electronics 1
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