The K Project Descriptor Table Interrupt and Exception Handling - PowerPoint PPT Presentation

The K Project LSE Team Introduction Interrupt The K Project Descriptor Table Interrupt and Exception Handling Interrupt Request Keyboard Timer LSE Team Conclusion EPITA May 06, 2019 LSE Team (EPITA) The K Project May 06, 2019 1 / 37

Interrupt and Exception Handling The K Project LSE Team Introduction Interrupt Descriptor Table Exception : Synchronous with program execution Interrupt Request (e.g. division by zero, accessing an invalid address) Keyboard Interrupt : Asynchronous with program execution. Timer Generated by devices external to the CPU Conclusion LSE Team (EPITA) The K Project May 06, 2019 2 / 37

Interrupt Descriptor Table The K Project LSE Team Introduction Interrupt Descriptor Table Interrupt Request Keyboard Timer Conclusion Figure: IDT LSE Team (EPITA) The K Project May 06, 2019 3 / 37

Interrupt Descriptor Table Register The K Project LSE Team Introduction Interrupt Descriptor Table Interrupt Request Keyboard Timer Conclusion Figure: IDTR LSE Team (EPITA) The K Project May 06, 2019 4 / 37

Load IDT The K Project LSE Team Introduction idt_r idtr; Interrupt Descriptor Table idtr.base = idt; /* idt base address */ Interrupt Request idtr.limit = sizeof(idt) - 1; /* idt size - 1 */ Keyboard Timer __asm__ volatile("lidt %0 \ n" Conclusion : /* no output */ : "m" (idtr) : "memory"); LSE Team (EPITA) The K Project May 06, 2019 5 / 37

x86 Exceptions The K Project LSE Team Introduction Int. Description Interrupt Descriptor Table 0 Divide by 0 Interrupt 1 Debug Request 2 NMI Keyboard 3 Breakpoint Timer 4 Overflow Conclusion 5 Bound Range Exceeded 6 Invalid Opcode LSE Team (EPITA) The K Project May 06, 2019 6 / 37

x86 Exceptions The K Project LSE Team Introduction Int. Description Interrupt Descriptor Table 7 Device Not Available Interrupt 8 Double Fault Request 9 Coprocessor Keyboard 10 Invalid TSS Timer 11 Segment not present Conclusion 12 Stack Segment Fault 13 General Protection 14 Page Fault LSE Team (EPITA) The K Project May 06, 2019 7 / 37

x86 Exceptions and Interrupts The K Project LSE Team Int. Description Introduction Interrupt 15 (Intel reserved) Descriptor Table 16 x87 FPU (Math Interrupt Fault) Request 17 Alignment Check Keyboard Timer 18 Machine Check Conclusion 19 SMD Floating Point Ex. 20 Virtualization Ex. 21-31 (Intel reserved) 32-255 User Defined LSE Team (EPITA) The K Project May 06, 2019 8 / 37

x86 Interrupt The K Project LSE Team Introduction Interrupt Descriptor int $3 ; Breakpoint Table int $0x80 ; Syscall Interrupt Request Keyboard Intel’s definition, Vol2a Timer “The INT n instruction generates a call to the interrupt or Conclusion exception handler specified with the destination operand” LSE Team (EPITA) The K Project May 06, 2019 9 / 37

Context Switching The K Project LSE Team Introduction Interrupt Descriptor Table Interrupt Request Keyboard Timer Conclusion Figure: Stack Usage LSE Team (EPITA) The K Project May 06, 2019 10 / 37

Context Switching The K Project LSE Team isr: ;<save registers> Introduction pushl %esp Interrupt Descriptor call generic_c_handler Table add $4, %esp Interrupt Request ;<restore registers> Keyboard add $8, %esp Timer iret Conclusion .global isr_keyboard isr_keyboard: pushl $0 pushl $33 ; IRQ1 jmp isr LSE Team (EPITA) The K Project May 06, 2019 11 / 37

Programmable Interrupt Controller The K Project LSE Team Introduction Master Interrupt Descriptor 0 IRQ 0 Table 1 IRQ 1 S lave Interrupt 2 Request 0 IRQ 8 3 IRQ 3 Keyboard 1 IRQ 9 CPU INT 4 IRQ 4 Timer 2 IRQ 10 5 IRQ 5 Conclusion 3 IRQ 11 INT 6 IRQ 6 4 IRQ 12 7 IRQ 7 5 IRQ 13 6 IRQ 14 7 IRQ 15 Figure: PIC LSE Team (EPITA) The K Project May 06, 2019 12 / 37

Typical wiring of the PIC (Master) The K Project LSE Team Introduction IRQ0 - PIT Interrupt Descriptor IRQ1 - Keyboard Table Interrupt IRQ2 - Not assigned in PC/XT; cascaded to slave 8256 Request IRQ3 - UART (COM2 and COM4) Keyboard Timer IRQ4 - UART (COM1 and COM3) Conclusion IRQ5 - Hard disk in PC/XT; Parallel port LPT2 in PC/AT IRQ6 - Floppy disk controller IRQ7 - Parallel port LPT1 LSE Team (EPITA) The K Project May 06, 2019 13 / 37

Typical wiring of the PIC (Slave) The K Project LSE Team Introduction IRQ8 - RTC Interrupt Descriptor IRQ9 - Table Interrupt IRQ10 - Request IRQ11 - Keyboard Timer IRQ12 - PS/2 mouse controller Conclusion IRQ13 - Math coprocessor IRQ14 - Hard disk controller 1 IRQ15 - Hard disk controller 2 LSE Team (EPITA) The K Project May 06, 2019 14 / 37

PIC ports The K Project LSE Team Introduction Interrupt Descriptor Table 0x20 , the master PIC’s port A Interrupt Request 0x21 , the master PIC’s port B Keyboard 0xA0 , the slave PIC’s port A Timer 0xA1 , the slave PIC’s port B Conclusion LSE Team (EPITA) The K Project May 06, 2019 15 / 37

ICW1 The K Project LSE Team Introduction 0 0 0 1 x 0 x x Interrupt Descriptor | | | Table Interrupt | | +---- (1) Request | +------ (2) Keyboard +---------- (3) Timer Conclusion 1 ICW4 present (set) or not (clear) 2 single controller (set) or cascade mode (clear) 3 level triggered mode (set) or edge triggered mode(clear) LSE Team (EPITA) The K Project May 06, 2019 16 / 37

ICW2 The K Project LSE Team Introduction Interrupt Descriptor Table x x x x x 0 0 0 Interrupt Request | | | | | | | | Keyboard +------------------ (1) Timer Conclusion 1 Interrupt vector base address LSE Team (EPITA) The K Project May 06, 2019 17 / 37

ICW3 The K Project LSE Team Master PIC x x x x x x x x Introduction Interrupt | | | | | | | | Descriptor +------------------ (1) Table Interrupt Request Slave PIC Keyboard 0 0 0 0 0 x x x Timer | | | Conclusion +-------- (2) 1 For each bit, indicate whether a slave PIC is connected to this pin (set) or not (clear) 2 Indicate to the slave his slave ID (which pin of the master it is connected to) LSE Team (EPITA) The K Project May 06, 2019 18 / 37

ICW4 The K Project LSE Team Introduction 0 0 0 x x x x 1 Interrupt Descriptor | --- | Table Interrupt | | +------ (1) Request | +--------- (2) Keyboard +------------ (3) Timer Conclusion 1 Automatic (set) EOI or normal (clear) EOI 2 Buffering mode (no buffering) 3 Special mode fully nested (set) or not (clear) LSE Team (EPITA) The K Project May 06, 2019 19 / 37

OCW1 The K Project LSE Team Introduction Interrupt Descriptor Table x x x x x x x x Interrupt | | | | | | | | Request +------------------ (1) Keyboard Timer 1 For each bit, indicate whether the corresponding IRQ is Conclusion masked (set) or not (clear) LSE Team (EPITA) The K Project May 06, 2019 20 / 37

OCW2 The K Project LSE Team x x x 0 0 x x x Introduction | | | ----- Interrupt | | | | Descriptor Table | | | +------ (1) Interrupt | | +-------------- (2) Request | +---------------- (3) Keyboard +------------------ (4) Timer Conclusion 1 Interrupt level to be acted upon when sending a specific command 2 Send an EOI (end of interrupt command) (set) 3 Send a specific (set) or a non-specific (clear) command 4 Rotate priorities (set) or not (clear) LSE Team (EPITA) The K Project May 06, 2019 21 / 37

Recommended methodology The K Project Write IDT management fonctions LSE Team allocate/clean IDT set an interrupt gate in the IDT Introduction set a trap gate in the IDT Interrupt Descriptor Write the context saving/restoring routines in assembly Table Interrupt code Request Implement the exceptions and interrupts wrappers Keyboard Timer Write a function which builds the IDT and loads it Conclusion Initialize the PIC send ICWs to both master and slave PICs mask all interrupts Write very simple debug handlers like: printing an error message when executing a division by zero printing a string when a key is pressed Do not forget to enable hardware interrupts using sti LSE Team (EPITA) The K Project May 06, 2019 22 / 37

Possible bug causes The K Project LSE Team Introduction Interrupt Descriptor You forgot to save or restore some registers in your context Table You did not consider that gcc automatically generates the Interrupt Request prolog/epilog for C functions Keyboard The stack is misaligned when iret is executed Timer Conclusion PICs are not acknowledged after returning from an ISR (Interrupt SubRoutine) LSE Team (EPITA) The K Project May 06, 2019 23 / 37

Keyboard Registers The K Project LSE Team Introduction Interrupt Descriptor Table Interrupt Request 0x60 : I/0 buffer Keyboard 0x64 : Status register Timer Conclusion LSE Team (EPITA) The K Project May 06, 2019 24 / 37

Keyboard Status Register The K Project LSE Team Introduction x x x x x x x x Interrupt | | | | | | | | Descriptor Table | | | | | | | +---- Output buffer full Interrupt Request | | | | | | +------ Input buffer full Keyboard | | | | | +-------- System flag Timer | | | | +---------- Command/Data Conclusion | | | +------------ Keyboard inhibit | | +-------------- Auxiliary device output buffer | +---------------- General purpose time-out +------------------ Parity error LSE Team (EPITA) The K Project May 06, 2019 25 / 37