Statistical Ineffective Fault Attacks on Masked AES with Fault - PowerPoint PPT Presentation

Statistical Ineffective Fault Attacks on Masked AES with Fault Countermeasures Christoph Dobraunig, Maria Eichlseder, Hannes Gross, Stefan Mangard, Florian Mendel, Robert Primas ASIACRYPT 2018 IAIK - Graz University of Technology

www.tugraz.at Motivation Building cryptographic implementations is challenging: 1 Robert Primas — IAIK - Graz University of Technology

www.tugraz.at Motivation Building cryptographic implementations is challenging: • Requires usage of proper cryptographic primitives 1 Robert Primas — IAIK - Graz University of Technology

www.tugraz.at Motivation Building cryptographic implementations is challenging: • Requires usage of proper cryptographic primitives • But often also the usage of additional defenses ... • Microcontroller • FPGAs • ASICs 1 Robert Primas — IAIK - Graz University of Technology

www.tugraz.at Motivation Building cryptographic implementations is challenging: • Requires usage of proper cryptographic primitives • But often also the usage of additional defenses ... • Microcontroller • FPGAs • ASICs • ... because of implementation attacks 1 Robert Primas — IAIK - Graz University of Technology

www.tugraz.at Motivation • Proper cryptography does not mean practical security 2 Robert Primas — IAIK - Graz University of Technology

www.tugraz.at Motivation • Proper cryptography does not mean practical security • Every cryptographic implementation stores a secret 2 Robert Primas — IAIK - Graz University of Technology

www.tugraz.at Motivation • Proper cryptography does not mean practical security • Every cryptographic implementation stores a secret • Secrets can be extracted by: Power Analysis Fault Attacks 2 Robert Primas — IAIK - Graz University of Technology

Fault Attacks 3 Robert Primas — IAIK - Graz University of Technology

www.tugraz.at Fault Attacks • Get physical access to target device: P • Set plaintexts • Observe ciphertexts ENC C 4 Robert Primas — IAIK - Graz University of Technology

www.tugraz.at Fault Attacks • Get physical access to target device: P • Set plaintexts • Observe ciphertexts • Cause erroneous computations via: • Clock glitches ENC • Voltage glitches • Lasers C 4 Robert Primas — IAIK - Graz University of Technology

www.tugraz.at Fault Attacks • Get physical access to target device: P • Set plaintexts • Observe ciphertexts • Cause erroneous computations via: • Clock glitches ENC ENC • Voltage glitches • Lasers • Observe faulty and correct ciphertext C C 4 Robert Primas — IAIK - Graz University of Technology

www.tugraz.at Fault Attacks • Get physical access to target device: P • Set plaintexts • Observe ciphertexts • Cause erroneous computations via: • Clock glitches ENC ENC • Voltage glitches • Lasers • Observe faulty and correct ciphertext • Recover key C C 4 Robert Primas — IAIK - Graz University of Technology

www.tugraz.at Fault Attacks • Get physical access to target device: P • Set plaintexts • Observe ciphertexts • Cause erroneous computations via: • Clock glitches ENC ENC • Voltage glitches • Lasers • Observe faulty and correct ciphertext • Recover key C C ⇒ Differential Fault Attack (DFA) 4 Robert Primas — IAIK - Graz University of Technology

www.tugraz.at Fault Countermeasures - Detection P P ENC ENC • Use redundancy to detect faults ENC-DETECT ENC ENC C C C C C 5 Robert Primas — IAIK - Graz University of Technology

www.tugraz.at Fault Countermeasures - Detection P P ENC ENC • Use redundancy to detect faults ENC-DETECT ENC ENC • Fault detected → No ciphertext C C C C ... 5 Robert Primas — IAIK - Graz University of Technology

www.tugraz.at Fault Countermeasures - Detection P P ENC ENC • Use redundancy to detect faults ENC-DETECT ENC ENC • Fault detected → No ciphertext • 2 identical faults necessary for attack C C C C C 5 Robert Primas — IAIK - Graz University of Technology

www.tugraz.at Fault Countermeasures - Detection P P ENC ENC • Use redundancy to detect faults ENC-DETECT ENC ENC • Fault detected → No ciphertext • 2 identical faults necessary for attack C C → More redundancy, Enc-Dec, etc... C C C 5 Robert Primas — IAIK - Graz University of Technology

www.tugraz.at Statistical Ineffective Fault Attacks (SIFA) • We presented SIFA at CHES 2018: • Breaks detection countermeasures (any degree of redundancy) • Breaks infection countermeasures • Requires just a single fault injection per encryption • Require no precise knowledge about location and effect of the fault 6 Robert Primas — IAIK - Graz University of Technology

www.tugraz.at Statistical Ineffective Fault Attacks (SIFA) • We presented SIFA at CHES 2018: • Breaks detection countermeasures (any degree of redundancy) • Breaks infection countermeasures • Requires just a single fault injection per encryption • Require no precise knowledge about location and effect of the fault • We demonstrated applicability to AE schemes at SAC 2018 6 Robert Primas — IAIK - Graz University of Technology

www.tugraz.at Statistical Ineffective Fault Attacks (SIFA) • We presented SIFA at CHES 2018: • Breaks detection countermeasures (any degree of redundancy) • Breaks infection countermeasures • Requires just a single fault injection per encryption • Require no precise knowledge about location and effect of the fault • We demonstrated applicability to AE schemes at SAC 2018 • What about power analysis countermeasures? 6 Robert Primas — IAIK - Graz University of Technology

www.tugraz.at SIFA on AES in Pictures P P 1...N P 1...N P 1...N P 1...N P 1...N P 1...N P 1...N P 1...N : : : : : : : : ROUND 10 ROUND 9 ROUND 8 ROUND 10 ROUND 9 ROUND 8 ROUND 10 ROUND 9 ROUND 8 ROUND 10 ROUND 9 ROUND 8 ROUND 10 ROUND 9 ROUND 8 ROUND 10 ROUND 9 ROUND 8 ROUND 10 ROUND 9 ROUND 8 ROUND 10 ROUND 9 ROUND 8 SHIFT ROWS SHIFT ROWS SHIFT ROWS SHIFT ROWS SHIFT ROWS SHIFT ROWS SHIFT ROWS SHIFT ROWS MIX COLUMNS MIX COLUMNS MIX COLUMNS MIX COLUMNS MIX COLUMNS MIX COLUMNS MIX COLUMNS MIX COLUMNS KEY ADD 8 KEY ADD 8 KEY ADD 8 KEY ADD 8 KEY ADD 8 KEY ADD 8 KEY ADD 8 KEY ADD 8 SUB BYTES SUB BYTES SUB BYTES SUB BYTES SUB BYTES SUB BYTES SUB BYTES SUB BYTES ? SHIFT ROWS SHIFT ROWS SHIFT ROWS SHIFT ROWS SHIFT ROWS SHIFT ROWS SHIFT ROWS SHIFT ROWS MIX COLUMNS MIX COLUMNS MIX COLUMNS MIX COLUMNS MIX COLUMNS MIX COLUMNS MIX COLUMNS MIX COLUMNS KEY ADD 9 KEY ADD 9 KEY ADD 9 KEY ADD 9 KEY ADD 9 KEY ADD 9 KEY ADD 9 KEY ADD 9 SUB BYTES SUB BYTES SUB BYTES SUB BYTES SUB BYTES SUB BYTES SUB BYTES SUB BYTES SHIFT ROWS SHIFT ROWS SHIFT ROWS SHIFT ROWS SHIFT ROWS SHIFT ROWS SHIFT ROWS SHIFT ROWS KEY ADD 10 KEY ADD 10 KEY ADD 10 KEY ADD 10 KEY ADD 10 KEY ADD 10 KEY ADD 10 KEY ADD 10 C C C C C C N C N C N C C C C C N C N C N C 2 C C C C C N C N C N C C C C C N C N C N C N C N C N C N C N C N C N C N 7 Robert Primas — IAIK - Graz University of Technology

www.tugraz.at SIFA on AES in Pictures P P 1...N P 1...N P 1...N P 1...N : : : : ROUND 10 ROUND 9 ROUND 8 ROUND 10 ROUND 9 ROUND 8 ROUND 10 ROUND 9 ROUND 8 ROUND 10 ROUND 9 ROUND 8 SHIFT ROWS SHIFT ROWS SHIFT ROWS SHIFT ROWS MIX COLUMNS MIX COLUMNS MIX COLUMNS MIX COLUMNS KEY ADD 8 KEY ADD 8 KEY ADD 8 KEY ADD 8 SUB BYTES SUB BYTES SUB BYTES SUB BYTES ? SHIFT ROWS SHIFT ROWS SHIFT ROWS SHIFT ROWS MIX COLUMNS MIX COLUMNS MIX COLUMNS MIX COLUMNS KEY ADD 9 KEY ADD 9 KEY ADD 9 KEY ADD 9 SUB BYTES SUB BYTES SUB BYTES SUB BYTES SHIFT ROWS SHIFT ROWS SHIFT ROWS SHIFT ROWS KEY ADD 10 KEY ADD 10 KEY ADD 10 KEY ADD 10 C C C C C C C C C C C C C C C C C C N C N C N C N 7 Robert Primas — IAIK - Graz University of Technology