rsyn an extensible framework for physical design
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Rsyn - An Extensible Framework for Physical Design Guilherme Flach, Mateus Fogaa, Jucemar Monteiro, Marcelo Johann and Ricardo Reis Agenda 1. Introduction 2. Framework anatomy 3. Standard components 4. Conclusions 2 1. Introduction 3


  1. Rsyn - An Extensible Framework for Physical Design Guilherme Flach, Mateus Fogaça, Jucemar Monteiro, Marcelo Johann and Ricardo Reis

  2. Agenda 1. Introduction 2. Framework anatomy 3. Standard components 4. Conclusions 2

  3. 1. Introduction 3

  4. Motivations The increasing complexity of EDA problems Absence of an open-source collaborative platform for physical design Developing an EDA infrastructure is time consuming New research project (New problem) Problem-driven, Poor code reuse simplified and tuned and interoperability data structures 4

  5. Our experience with contests Gate sizing (ISPD 2012-2013) Incremental timing-driven placement (ICCAD 2014) Incremental timing and incremental CPPR (TAU 2015) Rsyn motivation Incremental timing-driven placement (ICCAD 2015) 5

  6. Our goal To share an open-source, modular and extensible framework to promote physical synthesis research and education. Help researchers to spend more time on algorithm development rather with infrastructure 6

  7. Key features 1. Elegant , dynamic and extensible netlist data model 2. A set of handful standard components 3. Extensibility 4. Graphical user interface 5. Support for academic and industrial file formats 7

  8. 2. Rsyn Framework Anatomy 8

  9. Rsyn Anatomy Overview GUI Shell Services Processes Timing Analysis Placement Congestion Routing start() Engine run() Sizing Routing Estimation Netlist Data Model 9

  10. Extensibility GUI Shell Services Processes Timing Analysis Placement Congestion Routing start() Engine run() Sizing Routing Estimation Netlist Data Model Service X Process X Service Y Process Y 10

  11. Netlist model Directed graph Support for hierarchy → Modules Pins are nodes Easy topological traversing Arcs are edges Cell and net arcs Top module Pin Port Cell arc Net Module Cell Net arc 11

  12. Library Shared information among instances are stored in the cell library elements LibraryCell: NAND2_X2_SVT LibraryPin: A LibraryPin: O LibraryPin: B LibraryArc: A →O B →O Library Netlist Cell Instance: U1 Cell Instance: U2 Cell Instance: U3 12

  13. Netlist Data Model // Traverse pins in reverse topological order. for (Rsyn::Pin pin : module. allPinsInReverseTopologicalOrder ()) { for (Rsyn::Arc arc : pin.allOutgoingArcs()) { /* … */ } for (Rsyn::Arc arc : pin.allIncomingArcs()) { /* … */ } Rsyn::Net net = pin.getNet(); if (!net) { std::cout << “Unconnected pin ‘” + pin.getFullName() + “‘\n”; } // end if } // end for 13

  14. Netlist Data Model Proxy style... Safe to use in mapping structures w/o incurring in non-determinism. // Traverse pins in reverse topological order. for (Rsyn::Pin pin : module. allPinsInReverseTopologicalOrder ()) { for (Rsyn::Arc arc : pin.allOutgoingArcs()) { /* … */ } for (Rsyn::Arc arc : pin.allIncomingArcs()) { /* … */ } Rsyn::Net net = pin.getNet(); if (!net) { std::cout << “Unconnected pin ‘” + pin.getFullName() + “‘\n”; } // end if } // end for 14

  15. Netlist Data Model Easy topological traversal… Topological ordering is incrementally updated due to netlist changes. // Traverse pins in reverse topological order. for (Rsyn::Pin pin : module. allPinsInReverseTopologicalOrder ()) { for (Rsyn::Arc arc : pin.allOutgoingArcs()) { /* … */ } for (Rsyn::Arc arc : pin.allIncomingArcs()) { /* … */ } Rsyn::Net net = pin.getNet(); if (!net) { std::cout << “Unconnected pin ‘” + pin.getFullName() + “‘\n”; } // end if } // end for 15

  16. Netlist Data Model Easy access to object collections: net.allPins(); cell.allPins(); cell.allArcs() // Traverse pins in reverse topological order. for (Rsyn::Pin pin : module. allPinsInReverseTopologicalOrder ()) { for (Rsyn::Arc arc : pin.allOutgoingArcs()) { /* … */ } for (Rsyn::Arc arc : pin.allIncomingArcs()) { /* … */ } Rsyn::Net net = pin.getNet(); if (!net) { std::cout << “Unconnected pin ‘” + pin.getFullName() + “‘\n”; } // end if } // end for 16

  17. Netlist Data Model Easy access to object properties: pin.getInstance(); net.getNumPins(); ... // Traverse pins in reverse topological order. for (Rsyn::Pin pin : module. allPinsInReverseTopologicalOrder ()) { for (Rsyn::Arc arc : pin.allOutgoingArcs()) { /* … */ } for (Rsyn::Arc arc : pin.allIncomingArcs()) { /* … */ } Rsyn::Net net = pin.getNet(); if (!net) { std::cout << “Unconnected pin ‘” + pin.getFullName() + “‘\n”; } // end if } // end for 17

  18. Attributes Net Rsyn internal data default User can easily specify new attributes for the netlist objects. User numSinks : int ... specific // Creating a new attribute called “visited” to the nets Rsyn::Attribute<Rsyn::Net, int> attr = design. createAttribute (); for (Rsyn::Net net : module. allNets ()) { attr[net] = net.getNumSinks(); } // end for Rsyn::Net newNet = module.createNet(); attr[newNet] = newNet.getNumPins(); 18

  19. Attributes Net Rsyn internal data default Map-style accessing... User numSinks : int ... specific // Creating a new attribute called “visited” to the nets Rsyn::Attribute<Rsyn::Net, int> attr = design. createAttribute (); for (Rsyn::Net net : module. allNets ()) { attr[net] = net.getNumSinks(); } // end for Rsyn::Net newNet = module.createNet(); attr[newNet] = newNet.getNumPins(); 19

  20. Attributes Net Rsyn internal data default Seamless handling of dynamic changes in the netlist... User numSinks : int ... specific // Creating a new attribute called “visited” to the nets Rsyn::Attribute<Rsyn::Net, int> attr = design. createAttribute (); for (Rsyn::Net net : module. allNets ()) { attr[net] = net.getNumSinks(); } // end for Rsyn::Net newNet = module.createNet(); attr[newNet] = newNet.getNumPins(); 20

  21. Notification system Rsyn::Observer onDesignDestruction() onPostInstanceCreate(Rsyn::Instance instance) onPreInstanceRemove(Rsyn::Instance instance) onPostNetCreate(Rsyn::Net net) onPreNetRemove(Rsyn::Net net) onPostCellRemap(Rsyn::Cell cell, Rsyn::LibraryCell oldLibraryCell) onPostPinConnect(Rsyn::Pin pin) onPrePinDisconnect(Rsyn::Pin pin) Implement MyClass Design registerObserver() /... /... notifyObservers() 21

  22. Services Rsyn::Service Remains active during several step flows start(Engine engine,const Json& params) stop() Analysis tools STA tool Implement Routing estimator Incremental Legalization MyService /... Shared infrastructure Density grid registerService() I/O tools Engine /... 22

  23. Processes Rsyn::Process Implement a simple task run(Engine engine,const Json& params) State is not kept after execution Implement Optimization methods Sizing MyProcess Placement /... Buffering registerService() Typically will rely on data stored by services Engine /... 23

  24. Commands GNU/Linux inspired syntax: <command> [<value> …] [-<param> <value> ...] Positional Named parameters parameters Supported parameter types: String , numeric and Json Commands may be called via script , GUI or shell 24

  25. Script open "iccad2015" { "parms" : "ICCAD15.parm", "config" : "superblue18/superblue18.iccad2015", "maxDisplacement" : 400, "targetUtilization" : 0.85 }; start “myService”; run “myOptimization” {“maxIterations” : 50, “effort” : 1}; myReport “report.txt” -nets -cells; 25

  26. GUI Canvas 26

  27. GUI Command input 27

  28. GUI Graphical commands and information 28

  29. 3. Standard components 29

  30. Physical design Geometric information of the circuit layout and technology Inspired by LEF/DEF Physical Design User-defined attributes Technology (LEF) Layout (DEF) Rows Obstacles Boundaries Physical library cell ... Cells Sites Notification system Position of cell Vias Layers (x, y) ... ... Floorplanning 30

  31. Routing estimation RoutingEstimator A way to estimate the //... interconnections among the pins of a net RC-Tree model RoutingEstimationModel Relies on the implementation of updateRoutingEstimation() a routing model (interface) Flexibility DefaultRoutingEstimationModel Rsyn provides a default estimator based on FLUTE Steiner RC Tree Generator FLUTE tree Physical Design 31

  32. Static timing analysis Timer //... Essential tool to assert the design performance TimingModel Flexible calculateNetArcTiming() calculateLibraryArcTiming() Currently supports: //... Early/late analysis Only one corner case DefaultTimingModel Rsyn provides a default timing model based on Elmore delay Net/Cell ElmoreCalculator Liberty arcs RoutingEstimator 32

  33. Static timing analysis Timer //... TimingModel Incremental timing update. calculateNetArcTiming() calculateLibraryArcTiming() Automatically kept in sync with the //... netlist. Path tracing. DefaultTimingModel Net/Cell ElmoreCalculator Liberty arcs RoutingEstimator 33

  34. Legalization 「 Jezz: An effective legalization algorithm for minimum displacement 」 by Julia Casarin Puget, Guilherme Flach, Ricardo Reis and Marcelo Johann SBCCI 2015 Inspired by abacus Provides full and incremental legalization Cache system for speed-up before after 34

  35. Third parties (Thank you!) OpenLiberty LEF/DEF NCTUgr FLUTE LEMON 35

  36. 4. Conclusions 36

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