Underpinning Research Reliability of WBG Automotive Traction Inverters Dr Layi Alatise Associate Professor of Power Electronic Devices University of Warwick 6 th June 2018
Contents Underpinning Research 1. SiC Power MOSFETs for Automotive Traction 2. Automotive Qualification of Power Semiconductors 3. Power Cycling of SiC Devices 4. Bias Temperature Instability of SiC Power Devices 5. The need for Condition Monitoring 6. Conclusions
Electric Vehicles Underpinning Research Power electronic • inverter needed for converting DC power to AC power for motor control Power electronics • also needed to charge the battery and interface with different electrical loads in the EV
Nissan Leaf Inverter Underpinning Research Nissan leaf inverter • Power IGBTs and PiN • diodes on DBC Substrate DC-DC Boost converter • needed to step-up battery voltage DC link approximately • 500 V Machine is a permanent • magnet synchronous motor
Toyota Prius Inverter Underpinning Research Toyota Prius inverter • Power IGBTs and PiN diodes on DBC Substrate • DC-DC Boost converter needed to step-up battery voltage • DC link approximately 500 to 600 V • Machine is a permanent magnet synchronous motor •
TESLA Inverter Underpinning Research Tesla inverter is comprised of discrete power semiconductors • Highly unusual not to use a conventional power module • Motor is an induction motor •
Material Properties of SiC Underpinning Research • SiC technology has a wider bandgap, higher critical field and higher thermal conductivity compared with silicon • These make for more efficient power devices with lower losses capable of high temperature operation
Losses in Power MOSFETs Underpinning Research There are different losses associated with driving power MOSFETs • These include device losses and gate drive losses • These losses are associated with the on-state resistance of the device and the • parasitic capacitances that need to be charged and discharged. Lateral DMOS
Contents Underpinning Research 1. SiC Power MOSFETs for Automotive Traction 2. Automotive Qualification of Power Semiconductors 3. Packaging Reliability 4. Bias Temperature Instability of SiC Power Devices 5. The need for Condition Monitoring 6. Conclusions
JEDEC and AEC101 Underpinning Research ● JEDEC means the Joint Electron Device Engineering Council and AEC means the Automotive Electronics Council ● Both regulate the standards for device tests and reliability ● All commercially available devices must pass these tests ● The tests include HTGB (High Temperature Gate Bias) HTRB (High Temperature Reverse Bias) THBS (Temperature Humidity Bias Stress Test) HS (Hot Storage) TMCL Temperature Cycling Thermal Fatigue (Otherwise known as Power Cycling) UHST (Unbiased Humidity Stress Test)
High Temperature Gate Bias Underpinning Research ● MOSFETs and IGBTs have MOS gates ● The MOS gate stands for Metal-Oxide-Semiconductor ● The Oxide should be a perfect Insulator ● However, defects in the oxide can cause conduction through the oxide ● All MOSFETs must pass 1000 hours of the rated gate voltage at 150 ° C ● Electrical Parameters (Threshold Voltage) must not shift by more than 25% otherwise it is classified as a fail
High Temperature Gate Bias Underpinning Research E G : Energy Bandgap q χ : Electron Affinity of the Semiconductor E C : Conduction Band E V : Valence Band E F : Fermi Level • The energy band diagram of the MOS interface shows the band-offsets between the semiconductor and the insulator • Carrier’s can tunnel through the oxide, if the electric field is high enough • Carriers can surmount the band-offset (Field emission)
High Temperature Gate Bias Underpinning Research • Under high temperature gate bias, traps can form in the oxide • The traps form through a diffusion process, hence, is temperature sensitive • These oxide traps increase the fixed oxide trap in the gate insulator • This can change the threshold voltage of the MOSFET depending on the polarity of the trapped charge A reduced threshold voltage is a 2 q N 2 Q si A B circuit hazard because of short F V 2 TH MS B C C circuits especially at elevated OX OX temperatures
High Temperature Gate Bias Underpinning Research • Because of the wide bandgap (3.4 eV), SiC has a smaller barrier height with SiO 2 and is therefore more susceptible to FN tunnelling • Si has a smaller bandgap and therefore has larger barrier heights with SiO 2 . • For most power electronics engineers, SiC still has to prove itself on HTGB SiC/SiO 2 band diagram, Band offsets of different semiconductors
High Temperature Reverse Bias Underpinning Research ● Mobile ions can lodge in the gate oxide and shift the threshold voltage ● However, defects in the oxide can cause conduction through the oxide ● All MOSFETs must pass 1000 hours at 80% of the rated blocking voltage at 150 ° C ● Electrical Parameters (Threshold Voltage) must not shift by more than 25% otherwise it is classified as a fail
High Temperature Reverse Bias Underpinning Research ● HTGB is an important test for detecting ionic contaminants. ● These contaminants will diffuse into the active area under the influence of temperature and high electric fields ● This occurs in metallisation processes with defects ● Ionic contaminants can diffuse into the active area and cause localised threshold voltage shifting
High Temperature Reverse Bias Underpinning Research ● Devices that fail under HTRB exhibit significant subthreshold conduction ● Eventually, the devices dissipate significant off- state power dissipation Drain Current (A) Drain Current (A) Subthreshold conduction Gate Voltage (V) Gate Voltage (V)
Contents Underpinning Research 1. SiC Power MOSFETs for Automotive Traction 2. Automotive Qualification of Power Semiconductors 3. Packaging Reliability 4. Bias Temperature Instability of SiC Power Devices 5. The need for Condition Monitoring 6. Conclusions
Power Device Packaging Underpinning Research ● The reliability of the power device under temperature cycling depends more on the packaging than the device ● Different packages perform in different ways Through-hole Through-hole SMD SMD Leadless Leadless Wafer-scale Aluminium wire Plastic Chip Solder Copper Leadframe Surface Mount Devices Standard TO-220/TO-247 (SOT404)
Power Device Packaging Underpinning Research ● SO-8 package has its advantages Chip Gold wire regarding module Plastic integration, but its poor transient thermal impedance SO8 Epoxy die-attach degrades it temperature cycling Fully Encapsulated Packages performance. ● Alternative packaging techniques can improve the performance under power cycling Power SO8 Package
Power Packaging Tests Underpinning Research ● For some high power applications, custom made DBC substrates are required ● Packaging tests are part of the JEDEC and AEC requirements ● These tests include Temperature cycling , Thermal Shock , Unbiased humidity stress tests , Thermal Fatigue and Temperature Humidity Bias Stress Tests . TOYOTA Prius Inverter comprised of silicon IGBTs DBC Substrate structure for high power applications
Power Packaging Tests Underpinning Research ● The primary indicator of failed packaging is the thermal resistance, on-state resistance and the gate resistance. ● The thermo-mechanical stress tests (TMCL, TFAT and TS) probe the Solder voiding integrity of the wire-bonds and die- attach . ● The humidity tests (UHST, THBS) probe the integrity of the hermetic sealing of the package. ● Power modules are subject to additional tests depending on the Wire-bond lift-off resulting from application requirements. power cycling
Power Module Failure Underpinning Research Thermo-mechanical failure due to stress cycling
Power Device Reliability Underpinning Research Solder pad delamination due to thermal cycling Wirebond lift-off due to thermal cycling
Contents Underpinning Research 1. SiC Power MOSFETs for Automotive Traction 2. Automotive Qualification of Power Semiconductors 3. Packaging Reliability 4. Bias Temperature Instability of SiC Power Devices 5. The need for Condition Monitoring 6. Conclusions
Short Circuit Stress Tests Underpinning Research Unintentional short circuits occur in • power electronic converters This subjects the transistor to • simultaneously high forward voltages and high output currents This means high instantaneous output • power that can easily destroy the device if the short circuit occurs long enough to raise the junction temperature beyond its rated temperature Short circuits can occur if • Cross-talk between complimenting devices in a phase leg causes • both Q1 and Q2 to turn on simultaneously The diode reverse recovery current in Q2 is in phase with a • complimenting transistor Q1 current
Crosstalk in Power Converters Underpinning Research For modelling the circuit, the top device is considered as an ideal switch while the model for the bottom device is shown in the equivalent circuit above.
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