RD53A Iref Trim and Injection Fine Delay Settings Aleksandra, - PowerPoint PPT Presentation

RD53A Iref Trim and Injection Fine Delay Settings Aleksandra, Charilou, Timon 2/2/18 RD53A Testing -- Iref Trim & InjDelay 1

Iref Trim Setup • Current reference generated by chip; used to obtain reference voltage. Need to trim to get optimal value. • Used jumpers on the Iref_Trim pins to change analog Iref Trim Settings. (Will later be set by wire bonds.) • Measured current on Iref IO with Keithley 2410 2/2/18 RD53A Testing -- Iref Trim & InjDelay 2

Iref Trim Results RD53A • Tested 5 different chips 5 A] µ 0x0C96 Current [ 0x072A • Nominal value (4uA) 0x0718 4.5 0x0717 0x0C94 found on setting 6-11, depending on the chip 4 3.5 3 0 2 4 6 8 10 12 14 Iref Trim Settings 2/2/18 RD53A Testing -- Iref Trim & InjDelay 3

Injection Fine Delay Setup • Two calibration signals (CAL_edge and CAL_aux) used to control the amount of charge injection. • Injection Fine Delay controls the timing of the CAL_edge pulse • Used register 39 to adjust the fine delay value and measured with an oscilloscope 2/2/18 RD53A Testing -- Iref Trim & InjDelay 4

Injection Fine Delay Results RD53A 0x0C96 • Tested 3 chips; each point 20 t [ns] y = a + b x varied by 0-100ps (50ps 18 ± a = -0.75192 0.29417 ∆ ± b = 1.59808 0.03706 16 resolution) 14 • Linear fit 12 10 • Base clock is 156.25MHz, 8 so the fine delay works 6 with 625MHz. Expected 4 slope is 1/625MHz=1.6ns. 2 0 0 2 4 6 8 10 12 14 Injection Fine Delay Setting 2/2/18 RD53A Testing -- Iref Trim & InjDelay 5