Propositional models Start with a fixed number of boolean variables - PDF document

1/22/2010 Propositional models Start with a fixed number of boolean variables called the vocabulary : e.g. a , b , c . Each boolean Historical models of computation variable represents a proposition, for example "today it is raining". A propositional model is an assignment from those variables to the values Steven Lindell {T, F}. E.g. symbol value Haverford College a T USA b F c T 1/22/2010 ISLA 2010 1 1/22/2010 ISLA 2010 2 Boolean functions Application: binary addition a b c f g A Boolean function is a Example : 1100 + 1110 = 11010 F F F F F map from the set of all F F T T F proposition models to the Carry = 1 1 0 0 0 decimal set {F, T}. F T F T F A = 1 1 0 0 = 12 This representation is F T T F T B = + 1 1 1 0 = 14 called a truth-table. T F F T F Sum = 1 1 0 1 0 = 26 • In the example, T F T F T f = the parity T T F F T g = the majority T T T T T 1/22/2010 ISLA 2010 3 1/22/2010 ISLA 2010 4 Sum and Carry Implementation using switches Derive equations for Sum and Carry as a Output true iff connectivity between terminals. function of a , b , c . Due to Shannon – the most influential master's thesis of 20th century [cf. opposite ‘hindrances’] no. of 1's = 0 1 2 3 = a + b + c Sum = 0 1 0 1 = a + b + c (mod 2) Boolean Connection Picture Carry = 0 0 1 1 = ( a + b + c ≥ 2) Using logical operations: False Open a  b  c Sum = PARity True Closed Carry = ( a  b )  ( b  c )  ( a  c ) MAJority 1/22/2010 ISLA 2010 5 1/22/2010 ISLA 2010 6 1

1/22/2010 Normally Open SPST relay Monotone Boolean functions N.O. relay Boolean 2-way switch Connection functional formula gate switching input diagram connection diagram circuit Off False Open (de-energized) a  b a OR is parallel On True Closed b (energized) a  b AND is series function formula gate switching a b diagram circuit ID a a 1/22/2010 ISLA 2010 7 1/22/2010 ISLA 2010 8 Majority Normally Closed SPST relay N.C. relay Boolean 2-way switch Connection function formula input diagram MAJ( a , b , c ) ( a  b )  ( b  c )  ( a  c ) Off False Closed (de-energized) gate diagram switching circuit On True Open (energized) b a a function formula gate switching b diagram circuit b c c  a NOT a c a 1/22/2010 ISLA 2010 9 1/22/2010 ISLA 2010 10 3-way (changeover) switch Exclusive-OR An SPDT relay equivalent to an N.O. and an N.C. function formula gate switching circuit relay mechanically ganged together. NO diagram common NC XOR 𝑏 ⊕ 𝑐 relay position Boolean 3-way switch diagram N.O. N.C. a b input NC Up common False Open Closed XNOR 𝑏 ⊕ 𝑐 (de-energized) NO a b NC Down common True Closed Open (energized) NO 1/22/2010 ISLA 2010 11 1/22/2010 ISLA 2010 12 2

1/22/2010 Majority revisited 4-way switch There are four monotone symmetric functions Two 3-way switches Input A Output A of three variables: combined together to NO NC Input B Output B form a 4-way switch. f 0 ( a , b , c ) = f 1 ( a , b , c ) = f 2 ( a , b , c ) = f 3 ( a , b , c ) = f 4 ( a , b , c ) = a + b + c ≥ 0 a + b + c ≥ 1 a + b + c ≥ 2 a + b + c ≥ 3 a + b + c ≥ 4 relay position Boolean input 4-way switch diagram always True same as OR the majority same as AND always False 0 size: O ( kn ) straight-thru Input A Output A False NO NC (de-energized) Input B Output B 1 c k fixed O ( n ) b 2 a c depth n cross-over Input A Output A b True NO NC c 3 (energized) Input B Output B 1/22/2010 ISLA 2010 13 1/22/2010 ISLA 2010 14 Parity 4-bit adder Multiple-input XOR Diagram of 4-bit full adder • Practical use: control light on stairway gate function formula switching circuit diagram PAR( a , b , c ) a  b  c Sum i = s i = PAR( a i , b i , c i ) b c a Carry i = c i +1 = MAJ( a i , b i , c i ) Use this circuit to solve later problems. 1/22/2010 ISLA 2010 15 1/22/2010 ISLA 2010 16 Carry look-ahead Manchester Chain 𝑕 𝑗 = 𝑏 𝑗 ∧ 𝑐 𝑗 carry generate 1 + 1 𝑑 𝑗 = ∃𝑘 < 𝑗 [𝑏 𝑘 ∧ 𝑐 𝑘 ] ∧ (∀𝑙, 𝑗 > 𝑙 > 𝑘)[𝑏 𝑙 ⊕ 𝑐 𝑙 ] carry propagate 0 + 1 = 1 + 0 𝑞 𝑗 = 𝑏 𝑗 ⊕ 𝑐 𝑗 carry terminate 0 + 0 𝑢 𝑗 = 𝑏 𝑗 ∨ 𝑐 𝑗 c i 1 + G = 𝑏 𝑗 ∧ 𝑐 𝑗 . . . . . . c P = 𝑏 𝑗 ⊕ 𝑐 𝑗 g i −1 · T = 𝑏 𝑗 ∨ 𝑐 𝑗 . . . . p i −1 p j +1 g j 0 s i = PAR( a i , b i , c i ) and all c i computed simultaneously constant depth circuit 1/22/2010 ISLA 2010 17 1/22/2010 ISLA 2010 18 3

1/22/2010 Read-once sequential computation Validity Reason : careful measure of read/write storage True in all (propositional) models: trivial Memory : read-only; write-only; oblivious cursor Concept : reads are destructive for working • Form implication consisting of the conjunction memory (not input); sort of no-cloning property of the premises arrows the conclusion. This is Example : carry computation a Boolean function too. • re-parenthesization Example : premises a , b ; conclusion c (carry-out). c := ab + bc + ac • Check to see if all rows of the truth-table are = ab + c ( a + b ) true. 1/22/2010 ISLA 2010 19 1/22/2010 ISLA 2010 20 Summary Predicate models for term logic • Fix a vocabulary of predicates : e.g. A , B , C . • Switching circuits are a computational model for Each predicate represents some class of propositional Boolean logic elements, such as "the set of all students". • Propositional validity is a finite procedure. I.e. in A predicate model consists of a domain a fixed vocabulary V, there are finitely many (sometimes called the universe) along with an propositional models, and finitely many Boolean assignment which interprets each of the functions. It is a simple matter to determine predicates as a subset of the domain. which of them are tautologies (just try out 2 |V| ). • If the domain is all people, then one of the • However, parameterized by the vocabulary, this is predicates could represent the set of students. co-NP-complete (the opposite of satisfiability). 1/22/2010 ISLA 2010 21 1/22/2010 ISLA 2010 22 Example Terms & Propositions Term : Take a model and return a derived predicate. Consider the model M = < D , S , M , W , L > given by male students : {Anuj, Ashok} Domain Students Men Women Logicians non-logicians : {John, Jane, Ashok, Mollie, Mary} Ed Ed Ed Proposition : compare two terms Tanvi Tanvi Tanvi Tanvi Statement Equation John John P  Q All P are Q Anuj Anuj Anuj Anuj Technically, a proposition could Some P are Q P  Q  Jane Jane be any function from constants P  Q  No P are Q Lisa Lisa Lisa and terms to {True, False}. Ashok Ashok Ashok No Women are Logicians W  L =  False Mollie Mollie Mollie Bob Bob Bob Mollie  S Mollie is a student True Mary Mary 1/22/2010 ISLA 2010 23 1/22/2010 ISLA 2010 24 4

1/22/2010 Validity Terms Syllogism Example Symbolically • Simple terms Major No healthy food is No P are M . Atomic predicates A , B , … in original vocabulary premise fattening. Complement − T T is a simple term Minor All cakes are fattening. All S are M . • Joining them together premise T 1  T 2 T 1 and T 2 are terms Union Conclusion No cakes are healthy. No S are P . T 1  T 2 T 1 and T 2 are terms Intersection • Can use Ladd-Franklin's Rule of Syllogism Example : W  − L = women non-logicians 1/22/2010 ISLA 2010 25 1/22/2010 ISLA 2010 26 Basic Statements Compound statements Given subject and predicate terms S and P : Example : consider T 1 and T 2 to be the statements  $ S · P I Some S are P . " S · ( W  L ) All students are women or logicians. " S · P A All S are P . $ L · ( M  S ) Some logicians are male students. • Can combine statements with disjunction and If P is negated, we get the other two forms: conjunction to form: T 1  T 2 and T 1  T 2 . $ S · − P O Some S are not P . Exercise (negation unnecessary): Show O and E " S · − P No S are P . E forms are unnecessary. Hint : push negations down. 1/22/2010 ISLA 2010 27 1/22/2010 ISLA 2010 28 Numerical quantifiers Threshold gates • k or more inputs are one: Definition : A quantifier is a monotone : symmetric function from sets to a Boolean. • for k = 1 this is OR. n k : • for k = n this is AND. • $ k S · P there are at least k S ’s which are P • " k S · P all except at most k −1 S ’s satisfy P Exercise : Show that for a fixed k , they can be implemented by depth 2, size n k circuits. Hint : Example : k = 1 is ordinary $ / " quantification use multiple input AND/OR gates. However, Exercise : show there are no more Shannon’s ladder diagram: linear depth and size. 1/22/2010 ISLA 2010 29 1/22/2010 ISLA 2010 30 5