IEEE EMC Society Distinguished Lecturer Seminar: IEEE EMC Society Distinguished Lecturer Seminar: IEEE EMC Society Distinguished Lecturer Seminar: IEEE EMC Society Distinguished Lecturer Seminar: Power Integrity of SiP (System In Package) Power Integrity of SiP (System In Package) July 21 2010 July 21, 2010 Joungho Kim at KAIST joungho@ee kaist ac kr joungho@ee.kaist.ac.kr http://tera.kaist.ac.kr TERA 1 Terahertz Interconnection and Package Laboratory Terahertz Interconnection and Package Laboratory
Contents I. Needs of SiP II. Power Integrity of SiP III III. PDN Design Challenges in SiP PDN D i Ch ll i SiP IV. Embedded decoupling capacitor and EBG structures V. PDN Isolation in SiP design VI VI. PDN noise coupling effects on Mixer, LNA, and OpAmp PDN i li ff t Mi LNA d O A VI. SSN Free 3D Clock Distribution Network VII. Power Integrity of TSV based 3D SiP VIII. Conclusion TERA 2 Terahertz Interconnection and Package Laboratory Terahertz Interconnection and Package Laboratory
Ubiquitous Mobile Life Ubiquitous Mobile Life Physical World Mobile Platform Player Computing Wired Communication Sensing/ Cognition/ Brain I dentification Wireless Entertainment Entertainment Medical/ Welfare Product service T l Telephony h I nternet network Robot Auto-mobile Auto mobile TERA 3 Terahertz Interconnection and Package Laboratory Terahertz Interconnection and Package Laboratory
3D Convergence System In Package 3D Convergence System In Package Multi-core Multi-core 3D Memory 3D Memory Processor Stack RF Filter Antenna Transmitter/ Receiver Receiver SRAM DRAM Flash Embedded Termination EBG de-cap Resistor Structure TERA 4 Terahertz Interconnection and Package Laboratory Terahertz Interconnection and Package Laboratory
Advantages of SiP approach Advantages of SiP approach □ ֺ Small form factor □ ֺ Fast time to market □ ֺ Inhomogeneous device integration □ g g □ ֺ Integration of passive devices, filters, and antenna □ ֺ Suitable for RF mobile communication systems □ ֺ Low cost TERA 5 Terahertz Interconnection and Package Laboratory Terahertz Interconnection and Package Laboratory 5
Power Supply Current Path Power Supply Current Path Low Inductance Capacitor on Package Discrete Decoupling Capacitor on PCB Ball Grid Array Package Chip Bulk Capacitor Ball Bonding VRM Ground Power Wire Wi Package P k Ball B ll PCB PCB Chip Δ I Bonding P/G Network Bonding P/G Network VRM Decoupling Capacitor Decoupling Capacitor Bulk Capacitor Decoupling Capacitor On Chip On Package On PCB Near VRM � Low impedance path of current-flow at high frequency. � Screen out large inductance. TERA 6 Terahertz Interconnection and Package Laboratory Terahertz Interconnection and Package Laboratory
Simultaneous Switching Noise (SSN) Simultaneous Switching Noise (SSN) V=VCC+ Δ V Δ I= Δ I 1+ ΔΙ 2+ Δ I= Δ I 1+ ΔΙ 2+ … Δ I n Δ I n Common Power Supply L Δ I 1 Δ I 2 Δ I n H H H Parasitic Inductance 1 2 n (due to Pins, Bond-wire, etc.) L L L L Common Ground Chip Δ I Increase of Maximum Power (Current) Δ V = L � Simultaneous Switching Noise (SSN) : Δ t Increase of Clock Frequency � SSN caused by simultaneous switching output buffers TERA 7 Terahertz Interconnection and Package Laboratory Terahertz Interconnection and Package Laboratory
Problems caused by SSN - Voltage margin reduction - Logic failure - Noise coupling to sensitive circuits (RF and analog circuits) N i li t iti i it (RF d l i it ) - Circuit reliability degradation (S/N, sensitivity) - Signal integrity degradation ( eye, jitter) - Electromagnetic radiation El t ti di ti TERA 8 Terahertz Interconnection and Package Laboratory Terahertz Interconnection and Package Laboratory
Inductive Impedance of PDN in SiP Inductive Impedance of PDN in SiP L PKG,wire L PKG,trace L PCB,decap L PKG,via PKG,via L PKG,ball S G G L P/G plane L PCB,via P S L totlal = L PKG,wire + L PKG,trace + L PKG,via + L PKG,ball + L PCB,via + L P/G plane + L PCB,decap TERA 9 Terahertz Interconnection and Package Laboratory Terahertz Interconnection and Package Laboratory
Reduction of PDN Inductance - Locate as close as possible - Reduce length of interconnect g - Wider, planar interconnect - Ground/return current path as close as possible, minimal loop size - Choose low ESL decoupling capacitors Choose low ESL decoupling capacitors - On chip decap > on-package decap > on-PCB decap - Thinner PCB and package substrate - Provide multiple paths (via pin wire decoupling capacitors) Provide multiple paths (via, pin, wire, decoupling capacitors) - Choose advanced package - Cost balance needed TERA 10 Terahertz Interconnection and Package Laboratory Terahertz Interconnection and Package Laboratory
Power/Ground Network Impedance Power/Ground Network Impedance Actual Actual pedance Impedance P/G Imp Ideal Impedance kHz MHz GHz THz Frequency [log] TERA 11 Terahertz Interconnection and Package Laboratory Terahertz Interconnection and Package Laboratory
Frequency Dependent Functions of Discrete Decoupling Capacitor Frequency Dependent Functions of Discrete Decoupling Capacitor Decoupling VRM Chip Capacitor j j ω ω − < < ω ω − e j j L L j j L L mpedance ω ω VRM DECAP C C Ground VRM DECAP Power Network I Capacitance given by Capacitance by Discrete Decoupling Capacitors Power/Ground Plane r/Ground N Power Inductance given by Inductance by Inductance by • ESL of Discrete Capacitor VRM or Power/Ground Plane Power/Ground Plane • Mount Pad ESL of Bulk Capacitor • Power/Ground Traces • Power/Ground Via Frequency GHz GHz KH KHz MH MHz TERA 12 Terahertz Interconnection and Package Laboratory Terahertz Interconnection and Package Laboratory
Frequency Dependent Functions of Discrete Decoupling Capacitor Frequency Dependent Functions of Discrete Decoupling Capacitor j j Decoupling VRM Chip ω − < ω − j L j L Capacitor ω ω DECAP VRM C C e DECAP C VRM V mpedance Ground j j ω − < ω − j L j L Power ω ω DECAP PLANE C C DECAP PLANE Network I Capacitance given by Capacitance given by Capacitance by Discrete Decoupling Capacitors Discrete Decoupling Capacitors Power/Ground Plane r/Ground N Power Inductance given by Inductance by Inductance by • ESL of Discrete Capacitor VRM or Power/Ground Plane Power/Ground Plane • Mount Pad ESL of Bulk Capacitor • Power/Ground Traces • Power/Ground Via Frequency GHz GHz KH KHz MH MHz TERA 13 Terahertz Interconnection and Package Laboratory Terahertz Interconnection and Package Laboratory
Good Power Distribution Network Good Power Distribution Network Battery Decoupling Capacitor p Voltage regulator Power Power plane on PCB Package Device Power trace on Wire- PCB bond TERA 14 Terahertz Interconnection and Package Laboratory Terahertz Interconnection and Package Laboratory
Low Impedance Water Pipe Low Impedance Water Pipe Resistive Pipe Inductive Pipe Inductive Pipe TERA 15 Terahertz Interconnection and Package Laboratory Terahertz Interconnection and Package Laboratory
What happens if power distribution network is bad? What happens if power distribution network is bad? TERA 16 Terahertz Interconnection and Package Laboratory Terahertz Interconnection and Package Laboratory
What happens if power distribution network is Good? What happens if power distribution network is Good? TERA 17 Terahertz Interconnection and Package Laboratory Terahertz Interconnection and Package Laboratory
Impedance Property of Chip-Package-PCB Hierarchical PDN Impedance Property of Chip-Package-PCB Hierarchical PDN thm) Interaction Interaction nce (Logari Impedan 10MHz 100MHz 1GHz 10GHz Frequency (Logarithm) � Advantage and application of PDN analysis in frequency domain Advantage and application of PDN analysis in frequency domain - Intuitive analysis - Easy to control impedance property � Need for hierarchical PDN simulation - Interactions between different level PDNs generate high impedance peak. TERA 18 Terahertz Interconnection and Package Laboratory Terahertz Interconnection and Package Laboratory
Case Study : Design of P/G Ring and Bonding Wire for 40Gbps PKG Case Study : Design of P/G Ring and Bonding Wire for 40Gbps PKG � The bonding wire length is minimized (1,800 µm � 630 µm), by cutting power/ground rings. [ Previous Design ] [ Previous Design ] [ Proposed Design ] [ Proposed Design ] 1,8 0 0 µm 1,8 0 0 µm 630 µm 630 µm TERA 19 Terahertz Interconnection and Package Laboratory Terahertz Interconnection and Package Laboratory
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