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On the Difficulty of FSM-based Hardware Obfuscation CHES 2018, September 10, 2018 Marc Fyrbiak 1 , Sebastian Wallat 2 , Jonathan Dchelotte 3 , Nils Albartus 1 , Sinan Bcker 1 Russell Tessier 2 , Christof Paar 1,2 1 Ruhr-Universitt Bochum 2


  1. On the Difficulty of FSM-based Hardware Obfuscation CHES 2018, September 10, 2018 Marc Fyrbiak 1 , Sebastian Wallat 2 , Jonathan Déchelotte 3 , Nils Albartus 1 , Sinan Böcker 1 Russell Tessier 2 , Christof Paar 1,2 1 Ruhr-Universität Bochum 2 University of Massachusetts Amherst 3 University of Bordeaux

  2. Motivation • IP cores transparent to numerous stakeholders • Problem for IP owner(s): piracy 2/19 On the Difficulty of FSM-based Hardware Obfuscation | CHES 2018 | Amsterdam | September 10, 2018

  3. Motivation • IP cores transparent to numerous stakeholders • Problem for IP owner(s): piracy • Solution: IP theft protection and obfuscation 2/19 On the Difficulty of FSM-based Hardware Obfuscation | CHES 2018 | Amsterdam | September 10, 2018

  4. Motivation • IP cores transparent to numerous stakeholders • Problem for IP owner(s): piracy • Solution: IP theft protection and obfuscation • State-of-the-Art: FSM obfuscation assumed to provide strong protection 0 0 1 ◦ HARPOON ◦ Dynamic State Deflection S 0 S 1 ◦ Active Hardware Metering 1 ◦ Interlocking Obfuscation 2/19 On the Difficulty of FSM-based Hardware Obfuscation | CHES 2018 | Amsterdam | September 10, 2018

  5. Motivation • IP cores transparent to numerous stakeholders • Problem for IP owner(s): piracy • Solution: IP theft protection and obfuscation • State-of-the-Art: FSM obfuscation assumed to provide strong protection 0 0 1 ◦ HARPOON ◦ Dynamic State Deflection S 0 S 1 ◦ Active Hardware Metering 1 ◦ Interlocking Obfuscation Our Research Question: How secure are these schemes? 2/19 On the Difficulty of FSM-based Hardware Obfuscation | CHES 2018 | Amsterdam | September 10, 2018

  6. Adversary Model Assumptions: • Access to flattened gate-level netlist equipped with FSM obfuscation • No information about module hierarchies, synthesis options, and names Goal: • Deobfuscate design to commit IP infringement 3/19 On the Difficulty of FSM-based Hardware Obfuscation | CHES 2018 | Amsterdam | September 10, 2018

  7. FSM Obfuscation - Dynamic State Deflection • Obfuscation FSM and blackhole FSM are added to original FSM • Enabling key only known to honest parties 4/19 On the Difficulty of FSM-based Hardware Obfuscation | CHES 2018 | Amsterdam | September 10, 2018

  8. FSM Obfuscation - Dynamic State Deflection • Obfuscation FSM and blackhole FSM are added to original FSM • Enabling key only known to honest parties • How challenging is FSM reverse engineering and how secure is this scheme? 4/19 On the Difficulty of FSM-based Hardware Obfuscation | CHES 2018 | Amsterdam | September 10, 2018

  9. Agenda 1 Automated FSM Reverse Engineering 2 Case Study: Deobfuscation of Dynamic State Deflection 3 Hardware Nanomites 4 Conclusion 5/19 On the Difficulty of FSM-based Hardware Obfuscation | CHES 2018 | Amsterdam | September 10, 2018

  10. Problem I: Determine FSM Gates in Gate-level Netlist • Ideas build upon previous work by Shi et al. and Meade et al. State Memory Transition Logic Output Logic 6/19 On the Difficulty of FSM-based Hardware Obfuscation | CHES 2018 | Amsterdam | September 10, 2018

  11. Problem I: Determine FSM Gates in Gate-level Netlist • Ideas build upon previous work by Shi et al. and Meade et al. • FSM Property I: Register control signals State Memory Transition Logic Output Logic 6/19 On the Difficulty of FSM-based Hardware Obfuscation | CHES 2018 | Amsterdam | September 10, 2018

  12. Problem I: Determine FSM Gates in Gate-level Netlist • Ideas build upon previous work by Shi et al. and Meade et al. • FSM Property II: Strongly connected component State Memory Transition Logic Output Logic 6/19 On the Difficulty of FSM-based Hardware Obfuscation | CHES 2018 | Amsterdam | September 10, 2018

  13. Problem I: Determine FSM Gates in Gate-level Netlist • Ideas build upon previous work by Shi et al. and Meade et al. • FSM Property III: Combinational logic feedback path State Memory Transition Logic Output Logic 6/19 On the Difficulty of FSM-based Hardware Obfuscation | CHES 2018 | Amsterdam | September 10, 2018

  14. Problem I: Determine FSM Gates in Gate-level Netlist • Ideas build upon previous work by Shi et al. and Meade et al. • FSM Property IV: Control behavior State Memory Transition Logic Output Logic 6/19 On the Difficulty of FSM-based Hardware Obfuscation | CHES 2018 | Amsterdam | September 10, 2018

  15. Problem II: Determine State Transition Graph from FSM Gates • Ideas build upon previous work by Shi et al. and Meade et al. module FSM (CLK, I , O) ; input CLK, I ; output O; wire o_G1 , o_G2 ; XOR G1 ( . IN1 (o_G2) , . IN2 ( I ) , .O(o_G1) ) ; DFF G2 ( .CLK(CLK) , .D(o_G1) , .Q(o_G2) ) ; INV G3 ( . IN (o_G2) , .O(O) ) ; endmodule 7/19 On the Difficulty of FSM-based Hardware Obfuscation | CHES 2018 | Amsterdam | September 10, 2018

  16. Problem II: Determine State Transition Graph from FSM Gates • Ideas build upon previous work by Shi et al. and Meade et al. module FSM (CLK, I , O) ; input CLK, I ; G1 G3 O output O; I G2 wire o_G1 , o_G2 ; XOR G1 ( . IN1 (o_G2) , . IN2 ( I ) , .O(o_G1) ) ; DFF G2 ( .CLK(CLK) , .D(o_G1) , .Q(o_G2) ) ; INV G3 ( . IN (o_G2) , .O(O) ) ; endmodule 7/19 On the Difficulty of FSM-based Hardware Obfuscation | CHES 2018 | Amsterdam | September 10, 2018

  17. Problem II: Determine State Transition Graph from FSM Gates • Ideas build upon previous work by Shi et al. and Meade et al. module FSM (CLK, I , O) ; input CLK, I ; G1 G3 O output O; I G2 wire o_G1 , o_G2 ; XOR G1 ( . IN1 (o_G2) , . IN2 ( I ) , .O(o_G1) ) ; DFF G2 ( .CLK(CLK) , .D(o_G1) , .Q(o_G2) ) ; INV G3 ( S 0 . IN (o_G2) , .O(O) ) ; 1 endmodule 7/19 On the Difficulty of FSM-based Hardware Obfuscation | CHES 2018 | Amsterdam | September 10, 2018

  18. Problem II: Determine State Transition Graph from FSM Gates • Ideas build upon previous work by Shi et al. and Meade et al. module FSM (CLK, I , O) ; input CLK, I ; G1 G3 O output O; I G2 wire o_G1 , o_G2 ; XOR G1 ( . IN1 (o_G2) , . IN2 ( I ) , .O(o_G1) ) ; DFF G2 ( 0 .CLK(CLK) , .D(o_G1) , .Q(o_G2) ) ; INV G3 ( S 0 . IN (o_G2) , .O(O) ) ; 1 endmodule 7/19 On the Difficulty of FSM-based Hardware Obfuscation | CHES 2018 | Amsterdam | September 10, 2018

  19. Problem II: Determine State Transition Graph from FSM Gates • Ideas build upon previous work by Shi et al. and Meade et al. module FSM (CLK, I , O) ; input CLK, I ; G1 G3 O output O; I G2 wire o_G1 , o_G2 ; XOR G1 ( . IN1 (o_G2) , . IN2 ( I ) , .O(o_G1) ) ; DFF G2 ( 0 1 .CLK(CLK) , .D(o_G1) , .Q(o_G2) ) ; INV G3 ( S 0 S 1 . IN (o_G2) , .O(O) ) ; 1 0 endmodule 7/19 On the Difficulty of FSM-based Hardware Obfuscation | CHES 2018 | Amsterdam | September 10, 2018

  20. Problem II: Determine State Transition Graph from FSM Gates • Ideas build upon previous work by Shi et al. and Meade et al. module FSM (CLK, I , O) ; input CLK, I ; G1 G3 O output O; I G2 wire o_G1 , o_G2 ; XOR G1 ( . IN1 (o_G2) , . IN2 ( I ) , .O(o_G1) ) ; DFF G2 ( 0 0 1 .CLK(CLK) , .D(o_G1) , .Q(o_G2) ) ; INV G3 ( S 0 S 1 . IN (o_G2) , .O(O) ) ; 1 0 endmodule 7/19 On the Difficulty of FSM-based Hardware Obfuscation | CHES 2018 | Amsterdam | September 10, 2018

  21. Problem II: Determine State Transition Graph from FSM Gates • Ideas build upon previous work by Shi et al. and Meade et al. module FSM (CLK, I , O) ; input CLK, I ; G1 G3 O output O; I G2 wire o_G1 , o_G2 ; XOR G1 ( . IN1 (o_G2) , . IN2 ( I ) , .O(o_G1) ) ; DFF G2 ( 0 0 1 .CLK(CLK) , .D(o_G1) , .Q(o_G2) ) ; INV G3 ( S 0 S 1 . IN (o_G2) , .O(O) ) ; 1 0 endmodule 1 7/19 On the Difficulty of FSM-based Hardware Obfuscation | CHES 2018 | Amsterdam | September 10, 2018

  22. Automated FSM Reverse Engineering FSM FSMs Candidates Boolean Topological Gate Function -level Analysis Netlist Analysis 8/19 On the Difficulty of FSM-based Hardware Obfuscation | CHES 2018 | Amsterdam | September 10, 2018

  23. Automated FSM Reverse Engineering FSM FSMs Candidates Boolean Topological Gate Function -level Analysis Netlist Analysis • Boolean Function Analysis: O ( | S | · 2 | I | ) ◦ | S | = Number of FSM states | I | = Number of FSM inputs 8/19 On the Difficulty of FSM-based Hardware Obfuscation | CHES 2018 | Amsterdam | September 10, 2018

  24. Agenda 1 Automated FSM Reverse Engineering 2 Case Study: Deobfuscation of Dynamic State Deflection 3 Hardware Nanomites 4 Conclusion 9/19 On the Difficulty of FSM-based Hardware Obfuscation | CHES 2018 | Amsterdam | September 10, 2018

  25. Reminder: Dynamic State Deflection • Obfuscation FSM and blackhole FSM are added to original FSM • Enabling key only known to honest parties • Case Study: AES + DSD ◦ 12-bit enabling key ◦ 14 obfuscation states ◦ 5 blackhole states per original one 10/19 On the Difficulty of FSM-based Hardware Obfuscation | CHES 2018 | Amsterdam | September 10, 2018

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