Is Process Scheduling a Dead Subject? Neil Audsley University of York, UK Real-Time Systems Group Tuesday, 5 July 2011
Introduction q Scheduling theory & research driven (to some extent) by hardware trends Ø eg. SMP trends have led to increase in multiprocessor scheduling q So where are hardware trends taking us now? Tuesday, 5 July 2011
Assumptions q The schedulable entity is the task q No. of schedulable entities (tasks) > no. of CPUs Ø otherwise scheduling theory largely trivial! q Architecture is essentially fixed q Memory hierarchy is effectively a single static (uniform) Ø accessed in a reactive / on-demand manner Tuesday, 5 July 2011
Observations / Trends q Parallelism Ø 4, 16, 64, ..., 1K, ..., 10K CPUs on a single die. Ø “Manhattan” Network on Chip interconnect q Simpler CPUs Ø Power, cooling, limited cache coherence etc RAM Multiple CPUs Tuesday, 5 July 2011
Observations / Trends q NUMA (Non-Uniform Memory Architecture) Ø Non-uniform access times q Huge bandwith / bottleneck Ø Use must be smoothed for energy / heat reasons q Intermediate memories Massive bandwidth RAM Intermediate memories Tuesday, 5 July 2011
Observations / Trends q Heterogeneous & Reconfigurable Ø CPUs (and network) can have dynamic capabilities Ø instruction sets, speeds, architecture (VLIW, GPU) Ø Function accelerators Ø Tasks can have multiple implementations Variable CPUs Function accelerators RAM Tuesday, 5 July 2011
Challenges q More CPUs than tasks Ø Schedule Data not Tasks Ø Data (and code) movement critical to timeliness Ø Offline issues – characterising tasks / systems in terms of data movement requirements q Time-space / heterogeneous Ø Assigning multiple CPUs (and/or function accelerators) to a task Ø Change the architecture (CPU configuration / function accelerators) Ø Necessarily dynamic / online Tuesday, 5 July 2011
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