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Highly integrated power electronic converters using active devices embedded in printed-circuit board Chenjiang Y U 1 , Cyril B UTTAY 2 , ric L ABOUR 1 , Vincent B LEY 3 , Cline C OMBETTES 3 1 GEEPS (LGEP), Paris, France 2 Laboratoire


  1. Highly integrated power electronic converters using active devices embedded in printed-circuit board Chenjiang Y U 1 , Cyril B UTTAY 2 , Éric L ABOURÉ 1 , Vincent B LEY 3 , Céline C OMBETTES 3 1 GEEPS (LGEP), Paris, France 2 Laboratoire Ampère, Lyon, France 3 LAPLACE, Toulouse, France 17/4/15 1 / 23

  2. Outline Introduction Review of PCB-based packaging Proposed Embedding Technique Summary and Conclusion 2 / 23

  3. Outline Introduction Review of PCB-based packaging Proposed Embedding Technique Summary and Conclusion 3 / 23

  4. Advantages of die embedding The Printed-Circuit-Board technology (PCB) enables: ◮ higher interconnect density ◮ multi-layer ◮ small pitch (down to 25 µ m linewidth) ◮ Low inductance [1] ◮ small size ◮ laminated busbar structure ◮ batch-processed manufacturing E. Hoene, “Ultra Low Inductance Package for SiC” ECPE ◮ all interconnects are processed at once workshop on power boards, 2012 4 / 23

  5. Advantages of die embedding The Printed-Circuit-Board technology (PCB) enables: ◮ higher interconnect density ◮ multi-layer ◮ small pitch (down to 25 µ m linewidth) ◮ Low inductance [1] ◮ small size ◮ laminated busbar structure ◮ batch-processed manufacturing E. Hoene, “Ultra Low Inductance Package for SiC” ECPE ◮ all interconnects are processed at once workshop on power boards, 2012 4 / 23

  6. Advantages of die embedding The Printed-Circuit-Board technology (PCB) enables: ◮ higher interconnect density ◮ multi-layer ◮ small pitch (down to 25 µ m linewidth) ◮ Low inductance [1] ◮ small size ◮ laminated busbar structure ◮ batch-processed manufacturing E. Hoene, “Ultra Low Inductance Package for SiC” ECPE ◮ all interconnects are processed at once workshop on power boards, 2012 4 / 23

  7. Outline Introduction Review of PCB-based packaging Proposed Embedding Technique Summary and Conclusion 5 / 23

  8. Literature Review – Converter on a flex substrate Delft TU “folded” converter [2, 3] images from ECPE Seminar “Power PCBs and Busbars”, Delft, 2008 ◮ Use of a flex substrate to form windings, ◮ wrapping around the larger components ◮ thermal management might prove difficult 6 / 23

  9. Literature Review – Flex PCB interconnects [4] ◮ Flex PCB instead of wirebonds ◮ Die top contact with solder/sintering ◮ requires suitable finish ◮ backside attached to a DBC ◮ commercially available from Semikron ◮ advantages: ◮ low profile, low inductance ◮ higher interconnect density S. Dieckerhoff et al., “Electric Characteristics of Planar Interconnect Technologies for Power MOSFETs” PESC 2007 7 / 23

  10. Literature Review – Flex PCB interconnects [4] [5] ◮ Flex PCB instead of wirebonds ◮ Die top contact with solder/sintering ◮ requires suitable finish ◮ backside attached to a DBC ◮ commercially available from Semikron ◮ advantages: T. Stockmeier et al. “SKiN: Double side sintering technology for new packages”, ISPD ◮ low profile, low inductance 2011 ◮ higher interconnect density 7 / 23

  11. Literature Review – Flex PCB interconnects [4] [5] [6] ◮ Flex PCB instead of wirebonds ◮ Die top contact with solder/sintering ◮ requires suitable finish ◮ backside attached to a DBC ◮ commercially available from Semikron ◮ advantages: ◮ low profile, low inductance ◮ higher interconnect density Y. Xiao et al., “Integrated flip-chip flex-circuit packaging for power electronics applications”, IEEE trans on Power Electronics vol. 19, 2004 7 / 23

  12. Literature Review – “PCB-like” 3D structures P . Ning et al. “A novel high-temperature planar package for SiC multichip phase-leg power module”, IEEE Trans on PE vol 25, 2010, 25, 2059 Silver-sintered interconnects and Epoxy/Kapton insulation [7] 8 / 23

  13. Literature Review – “PCB-like” 3D structures P . Ning et al. “A novel high-temperature planar package for SiC multichip phase-leg power Weidner, et al. “Planar Interconnect Technology for Power Module System Integration”, CIPS module”, IEEE Trans on PE vol 25, 2010, 25, 2059 2012 Silver-sintered interconnects and SiPLIT Copper electroplating, Epoxy/Kapton insulation [7] laminated isolation laser-structured in-situ [8] 8 / 23

  14. Literature Review – Passives embedding in PCB Embedding of capacitive layer [9] ◮ Established tech. in consumer electronics ◮ Mostly targeted at low-voltage ◮ Capacitance values: 10 pF – 5nF/cm 2 Andresakis, J. “Embedded Capacitors” Oak-Mitsui Technologies, 2005 9 / 23

  15. Literature Review – Passives embedding in PCB Embedding of capacitive layer [9] ◮ Established tech. in consumer electronics ◮ Mostly targeted at low-voltage ◮ Capacitance values: 10 pF – 5nF/cm 2 Integration of passives [10] ◮ Capacitive layers ◮ Magnetic layers ◮ Embedded Passives Integrated Circuit E. Waffenschmidt et al. “Design Method and Material Technologies for Passives in Printed Circuit Board Embedded Circuits” IEEE Trans. on (emPIC) PE, vol 20, 2005 9 / 23

  16. Literature Review – Die embedding in PCB – 1 Patents on chip embedding [11] A. Ostmann, “Leistungselektronik in der Leiterplatte” AT&S Technologieforum, 2013 ◮ Very active area in recent years ◮ Many applications to high interconnect density ◮ Several industrial developments (A&T, Schweizer, etc.) 10 / 23

  17. ❤tt♣✿✴✴✇✇✇✳♣❝❞❛♥❞❢✳❝♦♠✴♣❝❞❡s✐❣♥✴✐♥❞❡①✳♣❤♣✴❡❞✐t♦r✐❛❧✴♠❡♥✉✲❢❡❛t✉r❡s✴✾✷✺✼✲❝♦♠♣♦♥❡♥t✲♣❛❝❦❛❣✐♥❣✲✶✹✵✺ Literature Review – Die embedding in PCB – 2 Low-inductance packaging for SiC [1] ◮ Half bridge module ◮ 0.8 nH loop inductance ◮ Embedding die using stud bumps E. Hoene, “Ultra Low Inductance Package for SiC” ECPE workshop on power boards, 2012 11 / 23

  18. Literature Review – Die embedding in PCB – 2 Low-inductance packaging for SiC [1] ◮ Half bridge module ◮ 0.8 nH loop inductance ◮ Embedding die using stud bumps E. Hoene, “Ultra Low Inductance Package for SiC” ECPE workshop on power boards, 2012 ◮ Power module development through german project Hi-LEVEL [12] ◮ 10 kW and 50 kW demonstrators ◮ Thick copper or DBC for thermal management ❤tt♣✿✴✴✇✇✇✳♣❝❞❛♥❞❢✳❝♦♠✴♣❝❞❡s✐❣♥✴✐♥❞❡①✳♣❤♣✴❡❞✐t♦r✐❛❧✴♠❡♥✉✲❢❡❛t✉r❡s✴✾✷✺✼✲❝♦♠♣♦♥❡♥t✲♣❛❝❦❛❣✐♥❣✲✶✹✵✺ 11 / 23

  19. Literature Review – Considerations on CAD tools CAD tools with embedding capability [13] ◮ Automatic placement of parts ◮ Design rules (cavity size, height check, etc.) ◮ Generation of the manufacturing data ◮ Position of dies, cavities, laser drilling, etc. source: M. Brizoux et al. “Development of a Design & Manufacturing Environment for Reliable and Cost-Effective PCB Embedding Technology” IPC Apex, 2011 12 / 23

  20. Outline Introduction Review of PCB-based packaging Proposed Embedding Technique Summary and Conclusion 13 / 23

  21. Overview of the process ◮ Start with a DBC substrate ◮ Die attach (silver sintering) ◮ PCB stacking ◮ PCB lamination ◮ Topside copper etching ◮ Laser ablation ◮ Copper electroplating 14 / 23

  22. Overview of the process ◮ Start with a DBC substrate ◮ Die attach (silver sintering) ◮ PCB stacking ◮ PCB lamination ◮ Topside copper etching ◮ Laser ablation ◮ Copper electroplating 14 / 23

  23. Overview of the process ◮ Start with a DBC substrate ◮ Die attach (silver sintering) ◮ PCB stacking ◮ PCB lamination ◮ Topside copper etching ◮ Laser ablation ◮ Copper electroplating 14 / 23

  24. Overview of the process ◮ Start with a DBC substrate ◮ Die attach (silver sintering) ◮ PCB stacking ◮ PCB lamination ◮ Topside copper etching ◮ Laser ablation ◮ Copper electroplating 14 / 23

  25. Overview of the process ◮ Start with a DBC substrate ◮ Die attach (silver sintering) ◮ PCB stacking ◮ PCB lamination ◮ Topside copper etching ◮ Laser ablation ◮ Copper electroplating 14 / 23

  26. Overview of the process ◮ Start with a DBC substrate ◮ Die attach (silver sintering) ◮ PCB stacking ◮ PCB lamination ◮ Topside copper etching ◮ Laser ablation ◮ Copper electroplating 14 / 23

  27. Overview of the process ◮ Start with a DBC substrate ◮ Die attach (silver sintering) ◮ PCB stacking ◮ PCB lamination ◮ Topside copper etching ◮ Laser ablation ◮ Copper electroplating 14 / 23

  28. Overview of the process – significant points ◮ Backside die attach with silver sintering: ◮ The die does not move during assembly ◮ Accurate positioning ◮ Ablation using a CO 2 laser ◮ Very good selectivity (metal layers insensitive to laser light) ◮ Use of the copper layer as an alignment mask ◮ Prototype-scale equipment used ◮ Can manufacture prototypes from 4x4 cm 2 up to 21x28 cm 2 ◮ Affordable, useful for process development. 15 / 23

  29. Overview of the process – significant points ◮ Backside die attach with silver sintering: ◮ The die does not move during assembly ◮ Accurate positioning ◮ Ablation using a CO 2 laser ◮ Very good selectivity (metal layers insensitive to laser light) ◮ Use of the copper layer as an alignment mask ◮ Prototype-scale equipment used ◮ Can manufacture prototypes from 4x4 cm 2 up to 21x28 cm 2 ◮ Affordable, useful for process development. 15 / 23

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