Fault Insertion using IEEE1149.x Implementation of Fault Insertion - PowerPoint PPT Presentation

EBTW05 EBTW05 Fault Insertion using IEEE1149.x Implementation of Fault Insertion in a commercial product and required bsdl support Ken Filliter National Semiconductor Pete Collins JTAG Technologies EBTW 2005, Tallinn, Estonia Slide 1

EBTW05 EBTW05 Fault Insertion – the Technique � Fault Insertion or Injection is the technique of creating temporary stuck-at hardware faults to aid in the verification and debug of diagnostic hardware. � In an ideal world injected faults are: � Plentiful – ie multiple potential locations. � Random -- ie act as independent events � Potentially Simultaneous � Stuck-at High or Low � Have no effect on Mission hardware � EASY and INEXPENSIVE EBTW 2005, Tallinn, Estonia Slide 2

EBTW05 EBTW05 Fault Insertion Example V CC 1 Fail Pass Inserted Fault Pass Pass EBTW 2005, Tallinn, Estonia Slide 3

EBTW05 EBTW05 Fault Insertion Example V CC 1 Fail Inserted Fault EBTW 2005, Tallinn, Estonia Slide 4

EBTW05 EBTW05 Fault Insertion - Approaches � Faults can be injected in hardware by adding switches. � Limited # of locations – concern about effect on mission circuit – custom approach may not always be repeatable. � Faults can be injected in Si with proprietary techniques. � Drawbacks of proprietary approach – documentation, 3 rd party support,etc. � Faults can be injected using software – various ways. � Not necessarily a true test of the “hardware”. Can be labour intensive. � Faults can be injected using boundary scan (IEEE1149.x) � Needs to be described in bsdl and readily imported by 3 rd parties. EBTW 2005, Tallinn, Estonia Slide 5

EBTW05 EBTW05 Comparison of Methods Hardware Proprietary Si Software IEEE1149.x Plentiful Random No Effect on ? Mission EASY and ? INEXPENSIVE EBTW 2005, Tallinn, Estonia Slide 6

EBTW05 EBTW05 Comparison of Methods Hardware Proprietary Si Software IEEE1149.x Plentiful Random No Effect on Mission EASY and INEXPENSIVE WITH TOOL SUPPORT ! EBTW 2005, Tallinn, Estonia Slide 7

EBTW05 EBTW05 Fault Insertion Si Implementation � Must not interfere with the signal path ! � Must be compatible with IEEE1149.1, .4 and .6. � Should be as versatile as possible: � Multiple independent insertion points, possible on inputs and outputs, single ended or differential, stuck-at high or low. � Small Silicon area � Should not slow down or in any other way restrict or impede other uses of IEEE1149.x. � Must be Readily Described in bsdl and Friendly to 3 rd party Tools ! EBTW 2005, Tallinn, Estonia Slide 8

EBTW05 EBTW05 Design Implementation � Mux Fault Insertion Value with Test Data � No additional delays in the signal path � Establish new Register with Stuck-at Information � Avoid additional bits in the B/S register – no effect on test duration. � Easiest to describe in bsdl. � Use 2 bits per pin to describe stuck-at condition. � Stuck-at data is set to 0 or 1 � Stuck-at control determines if that pin will receive stuck-at data . � “Stuck-at” IEEE1149.x instruction loaded to create stuck-at � AND of TAP Stuck-at signal and pin specific stuck-at control bit will force stuck-at data value on targeted pins . EBTW 2005, Tallinn, Estonia Slide 9

EBTW05 EBTW05 StuckAt Output Cells Mission Dot 1/6 Data C U StuckAt Mode 1 On/Off From C U TAP StuckAt EBTW 2005, Tallinn, Estonia Slide 10

EBTW05 EBTW05 StuckAt Input Cells Pad Dot 1 Data C U StuckAt C U On/Off From TAP StuckAt EBTW 2005, Tallinn, Estonia Slide 11

EBTW05 EBTW05 dot 1, dot 6 and Fault Insertion Next BSC Next BSC CORE PAD dot 1 TAP dot 6 Prev BSC STUCK-AT STUCK-AT Control A Next Stuckat C E X T E Prev Stuckat S T STUCK-AT Value EBTW 2005, Tallinn, Estonia Slide 12

EBTW05 EBTW05 Fault Insertion Tool Support � For ‘fault insertion’ to be used effectively it must be supported by ‘third party’ boundary-scan tools vendors. � For ‘fault insertion’ to be easily implemented within software it must be described within the Boundary Scan Description Language (BSDL) file for the device. � It must be described in a format that can be easily read by any third party BSDL parser software. EBTW 2005, Tallinn, Estonia Slide 13

EBTW05 EBTW05 Stuck-at Data Register Description � The Stuck-at DATA Register order can be described simply in a table format, but this is not readable for standard BSDL parsers EBTW 2005, Tallinn, Estonia Slide 14

EBTW05 EBTW05 BSDL Extensions � The IEEE 1149.1 standard does attribute SA_REGISTER_LENGTH of SCAN90CP02 : entity is 20; attribute SA_REGISTER_LENGTH of SCAN90CP02 : entity is 20; allow users to define their own extensions to the BSDL language attribute SA_REGISTER of SCAN90CP02 : entity is attribute SA_REGISTER of SCAN90CP02 : entity is to include new syntax for additional -- num cell port function safe [ccell disval rslt] -- num cell port function safe [ccell disval rslt] functionality "0 (BC_1, * ,CONTROLR , 0)," & "0 (BC_1, * ,CONTROLR , 0)," & "1 (SA_DATA, OUT_POS1 ,INTERNAL , X, 0, 0)," & "1 (SA_DATA, OUT_POS1 ,INTERNAL , X, 0, 0)," & � The extensions must be declared "2 (BC_1, * ,CONTROLR , 0)," & "2 (BC_1, * ,CONTROLR , 0)," & "3 (SA_DATA, OUT_POS0 ,INTERNAL , X, 2, 0)," & "3 (SA_DATA, OUT_POS0 ,INTERNAL , X, 2, 0)," & explicitly within the BSDL file "4 (BC_1, * ,CONTROLR , 0)," & "4 (BC_1, * ,CONTROLR , 0)," & "5 (SA_DATA, PEM11 ,INTERNAL , X, 4, 0)," & before they can be defined, or "5 (SA_DATA, PEM11 ,INTERNAL , X, 4, 0)," & "6 (BC_1, * ,CONTROLR , 0)," & "6 (BC_1, * ,CONTROLR , 0)," & within the user-defined package "7 (SA_DATA, PEM10 ,INTERNAL , X, 6, 0)," & "7 (SA_DATA, PEM10 ,INTERNAL , X, 6, 0)," & "8 (BC_1, * ,CONTROLR , 0)," & "8 (BC_1, * ,CONTROLR , 0)," & description, declared by the ‘ use ’ "9 (SA_DATA, PEM01 ,INTERNAL , X, 8, 0)," & "9 (SA_DATA, PEM01 ,INTERNAL , X, 8, 0)," & "10 (BC_1, * ,CONTROLR, 0)," & statement. "10 (BC_1, * ,CONTROLR, 0)," & "11 (SA_DATA, PEM00 ,INTERNAL , X, 10, 0)," & "11 (SA_DATA, PEM00 ,INTERNAL , X, 10, 0)," & "12 (BC_1, * ,CONTROLR, 0)," & "12 (BC_1, * ,CONTROLR, 0)," & � The BSDL Extension attributes for "13 (SA_DATA, EN_N1 ,INTERNAL , X, 12, 0)," & "13 (SA_DATA, EN_N1 ,INTERNAL , X, 12, 0)," & "14 (BC_1, * ,CONTROLR, 0)," & the ‘fault insertion’ capability are: "14 (BC_1, * ,CONTROLR, 0)," & "15 (SA_DATA, EN_N0 ,INTERNAL , X, 14, 0)," & "15 (SA_DATA, EN_N0 ,INTERNAL , X, 14, 0)," & "16 (BC_1, * ,CONTROLR, 0)," & "16 (BC_1, * ,CONTROLR, 0)," & "17 (SA_DATA, SEL1 ,INTERNAL , X, 16, 0)," & "17 (SA_DATA, SEL1 ,INTERNAL , X, 16, 0)," & "18 (BC_1, * ,CONTROLR, 0)," & attribute SA_REGISTER_LENGTH: BSDL_EXTENSION; "18 (BC_1, * ,CONTROLR, 0)," & "19 (SA_DATA, SEL0 ,INTERNAL , X, 18, 0)," ; attribute SA_REGISTER: BSDL_EXTENSION; "19 (SA_DATA, SEL0 ,INTERNAL , X, 18, 0)," ; EBTW 2005, Tallinn, Estonia Slide 15