EFFECT OF SFCL ON DISTRIBUTION POWER QUALITY by Shahram Najafi, - PowerPoint PPT Presentation

EFFECT OF SFCL ON DISTRIBUTION POWER QUALITY by Shahram Najafi, Prof. Vijay K. Sood , Ahmed Hosny University of Ontario Institute of Technology, Oshawa, Ontario Electrical Power and Energy Conference ( London-Canada) October 2012 1

Outline � Background � Faults and High Currents � SFCL as a Potential Solution � Power Quality � Voltage Sag � Harmonic Distortion � Case Study Model and Conditions � Simulation Results � Different Fault Types & SFCL Performance � Switching Distortion � Conclusion 2

Background � Continuous growth of demand resulted in higher fault current levels � An electrical fault occurs when current flows through an abnormal or unintended path � Mitigation of fault current levels using newer technology 3

Potential Solution � Responds to faults instantaneously, improves power quality, occupies less space, have less power losses in comparison to conventional fault current limiters � Extends the life of many protective devices, more reliable and allows the usage of existing switchers and circuit breakers � SFCL Operation principals and controller 4

SFCL Operation Principal � Consisting of two or more parallel connected circuit branches � RC snubber circuit is connected across each power electronic switch for mitigating the effect rate-of-change of ( di/dt ) during the switching ON instant � The SFCL is required to have low impedance under normal conditions but to have high impedance under fault conditions � The speed of the intervention must be high enough 5

SFCL Controller � In norma l operating conditions, the control scheme always triggers the IGBT ON , since modulated output wave (Vm) is higher than the sawtooth waveform (ST) Vm > ST � On detection of a fault , the conducting IGBT is switched OFF and the fault current is diverted to the limiting impedance since modulated output wave (Vm) is less than the sawtooth waveform (SW) Vm < ST 6

System Parameters & Conditions PARAMETERS VALUE Utility Voltage 115 kV Utility Voltage Source Impedance 1% Transformer #1 Voltage 115:15 kV Transformer#1 Power & Impedance 25MVA & 4.5% Z 1 =0.3101+j0.909 � , Z 0 =0.7186+j4.317 Transmission Line � Transformer #2 Voltage 15:4.16 kV Transformer#2 Impedance 20MVA & 9% Load Rating 10MW, 4.16 kV & 0.92 PF lagging • Initiation of fault at 0.0167 sec and fault lasts for 0.05 sec (3 cycle), and then cleared at 0.0667 sec 7

ONE-LINE DIAGRAM OF DISTRIBUTION NETWORK USING SFCL 8

SFCL Reference Current � The selection of the reference current is limited to the pick-up current of over-current relays, and the maximum current interrupting capability of the IGBT � And accordingly limiting impedance Z lim will be designed � Using Kirchhoff’s voltage law, the line current through the SFCL is given by, V ....................(1) utility I = lim Z T lim − 9

SFCL Limiting Impedance � Z T-lim is the total impedance from utility point up to the load including the point of fault ....(2) Z Z Z [( Z Z ) // Z ] = + + + T lim lim Trnsf 1 utility load Transf 2 fault − + Where, Z Trnsf1+utility is cumulative impedance of transformer# 1 and the utility, Z Transf2 is transformer# 2 impedance, Z load is the load impedance, Z fault is the fault impedance (in this paper the fault is assumed to be bolted with zero impedance) 10

SFCL Limiting Impedance Cont. � But, I lim is the desired limited maximum faulted current value during fault ........(3) I I * ( desired limited value) = lim ratd where, I ratd is the rated current value and ‘desired limited value’ is represented by a number multiplied by the pu rated current value � So, the limiting impedance that will result in desired limited fault current can be calculated as: ....(4) Z Z { Z [( Z Z ) // Z ]} = − + + lim T lim Trnsf 1 utility load Transf 2 fault − + 11

Line Currents: Without & With Limiter Phase “a” current waveform for Phase “a” line current waveform for symmetrical fault at bus B without SFCL; symmetrical fault at bus-bar B using SFCL; fault inception time = 16.67ms, � t = 10 � s, fault inception time = 16.67 ms, � t = 10 � s, Z fault =0 Z fault =0 12

Current Waveforms Through SFCL � A three-phase to ground (abc-g) fault with zero fault impedance is simulated at bus-bar B, just after the SFCL � The Simulated current waveforms through the SFCL components are presented I IGBT I ZnO I D1-D3 I LL I D2-D4 13

Distortion in Voltage Waveform Voltage waveform for symmetrical fault at bus-bar B with the SFCL; fault inception time = 16.67ms, Z fault =0 With SFCL Without SFCL Voltage magnitude for symmetrical fault) at bus-bar B with/without the SFCL; fault inception time = 33.33ms, Z fault =0 14

Current and Voltage Distortion Although the SFCL provides the desirable current limiting function, it exhibits harmonic characteristics that need to be carefully studied The Total Harmonic Distortion (THD) in the current wave is calculated as 40.11% and that in the voltage is 125% Per-unit frequency spectrum for phase Per-unit frequency spectrum for phase “a” current in case of symmetrical fault “a” voltage in case of a symmetrical at bus-bar B, Imax = 3.55 kA fault at bus-bar B, Vmax=10.59 kV 15

A Single-Phase to Ground (a-g) Fault, Z fault =0 Single phase to ground (the most frequent of occurrence fault in power system) is also shown below Voltage waveforms for Voltage waveforms for Current waveforms through line-to-ground (a-g) line-to-ground (a-g) the SFCL for line-to-ground fault at bus-bar B fault at bus-bar C , (a-g) fault at bus-bar B fewer switching actions & lower magnitudes 16

Conclusions � The SFCL has been used and implemented in this paper using EMTP program to study the impact of SFCL � SFCL effectively suppressed the fault voltage and mitigated fault current which decrease the short circuit stress on the network � Analyzing transient behavior of the semiconductor switch assist to improve power quality, to decrease energy dissipation and to reduce the stress on system equipment 17

Conclusions Cont. � The SFCL however exhibits harmonic generation due to the switching of the IGBT � Some alternative control circuits to alleviate this problem are under investigation � In future work, the coordination of the SCFL and the existing circuit breaker elements in the studied power system will also be investigated 18

THANK YOU QUESTIONS ? 19